| /external/llvm/lib/Target/XCore/ |
| D | XCoreInstrInfo.cpp | 35 namespace XCore { namespace
50 : XCoreGenInstrInfo(XCore::ADJCALLSTACKDOWN, XCore::ADJCALLSTACKUP), in XCoreInstrInfo()
66 if (Opcode == XCore::LDWFI) in isLoadFromStackSlot()
88 if (Opcode == XCore::STWFI) in isStoreToStackSlot()
106 return BrOpc == XCore::BRFU_u6 in IsBRU()
107 || BrOpc == XCore::BRFU_lu6 in IsBRU()
108 || BrOpc == XCore::BRBU_u6 in IsBRU()
109 || BrOpc == XCore::BRBU_lu6; in IsBRU()
113 return BrOpc == XCore::BRFT_ru6 in IsBRT()
114 || BrOpc == XCore::BRFT_lru6 in IsBRT()
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| D | XCoreRegisterInfo.cpp | 45 : XCoreGenRegisterInfo(XCore::LR) { in XCoreRegisterInfo()
70 case XCore::LDWFI: in InsertFPImmInst()
71 BuildMI(MBB, II, dl, TII.get(XCore::LDW_2rus), Reg) in InsertFPImmInst()
76 case XCore::STWFI: in InsertFPImmInst()
77 BuildMI(MBB, II, dl, TII.get(XCore::STW_2rus)) in InsertFPImmInst()
83 case XCore::LDAWFI: in InsertFPImmInst()
84 BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l2rus), Reg) in InsertFPImmInst()
101 unsigned ScratchOffset = RS->scavengeRegister(&XCore::GRRegsRegClass, II, 0); in InsertFPConstInst()
106 case XCore::LDWFI: in InsertFPConstInst()
107 BuildMI(MBB, II, dl, TII.get(XCore::LDW_3r), Reg) in InsertFPConstInst()
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| D | XCoreFrameLowering.cpp | 35 static const unsigned FramePtr = XCore::R10;
107 int Opcode = isImmU6(OpImm) ? XCore::EXTSP_u6 : XCore::EXTSP_lu6; in IfNeededExtSP()
129 int Opcode = isImmU6(OpImm) ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6; in IfNeededLDAWSP()
130 BuildMI(MBB, MBBI, dl, TII.get(Opcode), XCore::SP).addImm(OpImm); in IfNeededLDAWSP()
146 XCore::LR)); in GetSpillList()
200 int Opcode = isImmU6(Offset) ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6; in RestoreSpillList()
241 BuildMI(MBB, MBBI, dl, TII.get(XCore::LDWSP_ru6), XCore::R11).addImm(0); in emitPrologue()
261 int Opcode = isImmU6(Adjusted) ? XCore::ENTSP_u6 : XCore::ENTSP_lu6; in emitPrologue()
262 MBB.addLiveIn(XCore::LR); in emitPrologue()
265 MIB->addRegisterKilled(XCore::LR, MF.getSubtarget().getRegisterInfo(), in emitPrologue()
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| D | XCoreISelDAGToDAG.cpp | 121 Reg = CurDAG->getRegister(XCore::CP, MVT::i32); in SelectInlineAsmMemoryOperand()
124 Reg = CurDAG->getRegister(XCore::DP, MVT::i32); in SelectInlineAsmMemoryOperand()
143 return CurDAG->getMachineNode(XCore::MKMSK_rus, dl, in Select()
150 SDNode *node = CurDAG->getMachineNode(XCore::LDWCP_lru6, dl, MVT::i32, in Select()
165 return CurDAG->getMachineNode(XCore::LADD_l5r, dl, MVT::i32, MVT::i32, in Select()
171 return CurDAG->getMachineNode(XCore::LSUB_l5r, dl, MVT::i32, MVT::i32, in Select()
177 return CurDAG->getMachineNode(XCore::MACCU_l4r, dl, MVT::i32, MVT::i32, in Select()
183 return CurDAG->getMachineNode(XCore::MACCS_l4r, dl, MVT::i32, MVT::i32, in Select()
189 return CurDAG->getMachineNode(XCore::LMUL_l6r, dl, MVT::i32, MVT::i32, in Select()
194 return CurDAG->getMachineNode(XCore::CRC8_l4r, dl, MVT::i32, MVT::i32, in Select()
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| D | XCore.td | 1 //===-- XCore.td - Describe the XCore Target Machine -------*- tablegen -*-===//
10 // This is the top level entry point for the XCore target.
31 // XCore processors supported.
44 def XCore : Target {
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| D | LLVMBuild.txt | 1 ;===- ./lib/Target/XCore/LLVMBuild.txt -------------------------*- Conf -*--===;
23 name = XCore
31 parent = XCore
45 add_to_library_groups = XCore
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| D | XCoreRegisterInfo.td | 1 //===-- XCoreRegisterInfo.td - XCore Register defs ---------*- tablegen -*-===//
11 // Declarations that describe the XCore register file
16 let Namespace = "XCore";
45 def GRRegs : RegisterClass<"XCore", [i32], 32,
54 def RRegs : RegisterClass<"XCore", [i32], 32,
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| D | XCoreCallingConv.td | 1 //===- XCoreCallingConv.td - Calling Conventions for XCore -*- tablegen -*-===//
9 // This describes the calling conventions for XCore architecture.
13 // XCore Return Value Calling Convention
25 // XCore Argument Calling Conventions
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| D | XCoreMachineFunctionInfo.cpp | 38 const TargetRegisterClass *RC = &XCore::GRRegsRegClass; in createLRSpillSlot()
54 const TargetRegisterClass *RC = &XCore::GRRegsRegClass; in createFPSpillSlot()
65 const TargetRegisterClass *RC = &XCore::GRRegsRegClass; in createEHSpillSlot()
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| D | XCoreAsmPrinter.cpp | 272 case XCore::DBG_VALUE: in EmitInstruction()
274 case XCore::ADD_2rus: in EmitInstruction()
283 case XCore::BR_JT: in EmitInstruction()
284 case XCore::BR_JT32: in EmitInstruction()
287 if (MI->getOpcode() == XCore::BR_JT) in EmitInstruction()
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| D | Makefile | 12 TARGET = XCore
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| D | XCoreFrameToArgsOffsetElim.cpp | 54 if (MBBI->getOpcode() == XCore::FRAME_TO_ARGS_OFFSET) { in runOnMachineFunction()
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| D | XCoreISelLowering.h | 132 return XCore::R0; in getExceptionPointerRegister()
139 return XCore::R1; in getExceptionSelectorRegister()
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| /external/llvm/lib/Target/XCore/Disassembler/ |
| D | XCoreDisassembler.cpp | 206 unsigned Reg = getReg(Decoder, XCore::GRRegsRegClassID, RegNo); in DecodeGRRegsRegisterClass()
218 unsigned Reg = getReg(Decoder, XCore::RRegsRegClassID, RegNo); in DecodeRRegsRegisterClass()
281 Inst.setOpcode(XCore::STW_2rus); in Decode2OpInstructionFail()
284 Inst.setOpcode(XCore::LDW_2rus); in Decode2OpInstructionFail()
287 Inst.setOpcode(XCore::ADD_3r); in Decode2OpInstructionFail()
290 Inst.setOpcode(XCore::SUB_3r); in Decode2OpInstructionFail()
293 Inst.setOpcode(XCore::SHL_3r); in Decode2OpInstructionFail()
296 Inst.setOpcode(XCore::SHR_3r); in Decode2OpInstructionFail()
299 Inst.setOpcode(XCore::EQ_3r); in Decode2OpInstructionFail()
302 Inst.setOpcode(XCore::AND_3r); in Decode2OpInstructionFail()
[all …]
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| D | LLVMBuild.txt | 1 ;===- ./lib/Target/XCore/Disassembler/LLVMBuild.txt ------------*- Conf -*--===;
21 parent = XCore
23 add_to_library_groups = XCore
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| /external/llvm/lib/Target/XCore/InstPrinter/ |
| D | LLVMBuild.txt | 1 ;===- ./lib/Target/XCore/InstPrinter/LLVMBuild.txt -------------*- Conf -*--===;
21 parent = XCore
23 add_to_library_groups = XCore
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| /external/llvm/lib/Target/XCore/TargetInfo/ |
| D | LLVMBuild.txt | 1 ;===- ./lib/Target/XCore/TargetInfo/LLVMBuild.txt --------------*- Conf -*--===;
21 parent = XCore
23 add_to_library_groups = XCore
|
| /external/llvm/lib/Target/XCore/MCTargetDesc/ |
| D | LLVMBuild.txt | 1 ;===- ./lib/Target/XCore/MCTargetDesc/LLVMBuild.txt ------------*- Conf -*--===;
21 parent = XCore
23 add_to_library_groups = XCore
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| D | XCoreMCTargetDesc.cpp | 45 InitXCoreMCRegisterInfo(X, XCore::LR); in createXCoreMCRegisterInfo()
59 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, XCore::SP, 0); in createXCoreMCAsmInfo()
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| /external/clang/include/clang/Basic/ |
| D | BuiltinsXCore.def | 1 //===--- BuiltinsXCore.def - XCore Builtin function database ----*- C++ -*-===//
10 // This file defines the XCore-specific builtin function database. Users of
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| /external/llvm/test/MC/Disassembler/XCore/ |
| D | lit.local.cfg | 1 if not 'XCore' in config.root.targets:
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| /external/llvm/test/CodeGen/XCore/ |
| D | lit.local.cfg | 1 if not 'XCore' in config.root.targets:
|
| /external/llvm/test/Transforms/SLPVectorizer/XCore/ |
| D | lit.local.cfg | 1 if not 'XCore' in config.root.targets:
|
| /external/llvm/test/Transforms/LoopVectorize/XCore/ |
| D | lit.local.cfg | 1 if not 'XCore' in config.root.targets:
|
| /external/llvm/include/llvm/IR/ |
| D | IntrinsicsXCore.td | 1 //==- IntrinsicsXCore.td - XCore intrinsics -*- tablegen -*-==//
10 // This file defines all of the XCore-specific intrinsics.
|