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Searched refs:Z0 (Results 1 – 25 of 187) sorted by relevance

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/external/boringssl/src/crypto/modes/asm/
D	aesni-gcm-x86_64.pl	`59 $Z0,$Z1,$Z2,$Z3,$Xi) = map("%xmm$_",(0..8)); 73 vpxor $Z0,$Z0,$Z0 # $Z0 = 0 81 vmovdqu $Z0,16+8(%rsp) # "$Z3" = 0 116 vpxor $Z0,$Xi,$Xi # modulo-scheduled 118 vpxor $Z1,$T1,$Z0 155 vpxor $T1,$Z0,$Z0 177 vpxor $T2,$Z0,$Z0 199 vpxor $Hkey,$Z0,$Z0 226 vpxor $T2,$Z0,$Z0 232 vpxor $Z1,$Z0,$Z0 [all …]`
/external/llvm/test/CodeGen/CPP/
D	atomic.ll	5 …; CHECK: AtomicRMWInst* [[INST:[a-zA-Z0-9_]+]] = new AtomicRMWInst(AtomicRMWInst::Xchg, {{.}}, Se… 10 …; CHECK: AtomicRMWInst [[INST:[a-zA-Z0-9_]+]] = new AtomicRMWInst(AtomicRMWInst::Add, {{.}}, Seq… 15 …; CHECK: AtomicRMWInst [[INST:[a-zA-Z0-9_]+]] = new AtomicRMWInst(AtomicRMWInst::Sub, {{.}}, Mon… 20 …; CHECK: AtomicRMWInst [[INST:[a-zA-Z0-9_]+]] = new AtomicRMWInst(AtomicRMWInst::And, {{.}}, Acq… 25 …; CHECK: AtomicRMWInst [[INST:[a-zA-Z0-9_]+]] = new AtomicRMWInst(AtomicRMWInst::Nand, {{.}}, Re… 30 …; CHECK: AtomicRMWInst [[INST:[a-zA-Z0-9_]+]] = new AtomicRMWInst(AtomicRMWInst::Or, {{.}}, Sequ… 35 …; CHECK: AtomicRMWInst [[INST:[a-zA-Z0-9_]+]] = new AtomicRMWInst(AtomicRMWInst::Xor, {{.}}, Rel… 40 …; CHECK: AtomicRMWInst [[INST:[a-zA-Z0-9_]+]] = new AtomicRMWInst(AtomicRMWInst::Max, {{.}}, Mon… 45 …; CHECK: AtomicRMWInst [[INST:[a-zA-Z0-9_]+]] = new AtomicRMWInst(AtomicRMWInst::Min, {{.}}, Acq… 50 …; CHECK: AtomicRMWInst [[INST:[a-zA-Z0-9_]+]] = new AtomicRMWInst(AtomicRMWInst::UMax, {{.*}}, Mo… [all …]
/external/llvm/test/Transforms/InstCombine/
D	select-cmp-cttz-ctlz.ll	9 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i16 @llvm.ctlz.i16(i16 %x, i1 false) 20 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %x, i1 false) 31 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i64 @llvm.ctlz.i64(i64 %x, i1 false) 42 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i16 @llvm.ctlz.i16(i16 %x, i1 false) 53 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %x, i1 false) 64 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i64 @llvm.ctlz.i64(i64 %x, i1 false) 75 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i16 @llvm.cttz.i16(i16 %x, i1 false) 86 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %x, i1 false) 97 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i64 @llvm.cttz.i64(i64 %x, i1 false) 108 ; CHECK: [[VAR:%[a-zA-Z0-9]+]] = tail call i16 @llvm.cttz.i16(i16 %x, i1 false) [all …]
/external/clang/test/CodeGenObjCXX/
D	literals.mm	19 // CHECK: [[ARR:%[a-zA-Z0-9.]+]] = alloca i8* 20 // CHECK: [[OBJECTS:%[a-zA-Z0-9.]+]] = alloca [2 x i8] 25 …// CHECK: [[ELEMENT0:%[a-zA-Z0-9.]+]] = getelementptr inbounds [2 x i8], [2 x i8] [[OBJECTS]], … 27 // CHECK-NEXT: [[OBJECT0:%[a-zA-Z0-9.]+]] = invoke i8* @_ZNK1XcvP11objc_objectEv 28 // CHECK: [[RET0:%[a-zA-Z0-9.]+]] = call i8* @objc_retainAutoreleasedReturnValue(i8* [[OBJECT0]]) 32 …// CHECK: [[ELEMENT1:%[a-zA-Z0-9.]+]] = getelementptr inbounds [2 x i8], [2 x i8]* [[OBJECTS]], … 34 // CHECK: [[OBJECT1:%[a-zA-Z0-9.]+]] = invoke i8* @_ZNK1YcvP11objc_objectEv 35 // CHECK: [[RET1:%[a-zA-Z0-9.]+]] = call i8* @objc_retainAutoreleasedReturnValue(i8* [[OBJECT1]]) 71 // CHECK: [[ARR:%[a-zA-Z0-9.]+]] = alloca i8* 72 // CHECK: [[OBJECTS:%[a-zA-Z0-9.]+]] = alloca [2 x i8*] [all …]
D	arc-references.mm	`70 // CHECK-NEXT: [[OBJ_A:%.]] = bitcast i8 [[OBJ_ID]] to [[A:%[a-zA-Z0-9]+]]* 71 // CHECK-NEXT: store [[A]]* [[OBJ_A]], [[A]]** [[REFTMP:%[a-zA-Z0-9]+]] 74 // CHECK-NEXT: [[OBJ_A:%[a-zA-Z0-9]+]] = load [[A]], [[A]]* [[REFTMP]] 75 // CHECK-NEXT: [[OBJ_ID:%[a-zA-Z0-9]+]] = bitcast [[A]]* [[OBJ_A]] to i8*`
D	arc-move.mm	`53 …// CHECK: [[Y:%[a-zA-Z0-9]+]] = call dereferenceable({{[0-9]+}}) i8** @_Z4moveIRU8__strongP11objc_… 55 // CHECK-NEXT: [[OBJ:%[a-zA-Z0-9]+]] = load i8, i8* [[Y]] 59 // CHECK-NEXT: store i8* [[OBJ]], i8** [[X:%[a-zA-Z0-9]+]] 68 // CHECK-NEXT: [[OBJ:%[a-zA-Z0-9]+]] = load i8, i8* [[X]]`
/external/pdfium/third_party/lcms2-2.6/src/
D	cmsintrp.c	452 X0, Y0, Z0, X1, Y1, Z1; in TrilinearInterpFloat() local 477 Z0 = p -> opta[0] * z0; in TrilinearInterpFloat() 478 Z1 = Z0 + (Input[2] >= 1.0 ? 0 : p->opta[0]); in TrilinearInterpFloat() 482 d000 = DENS(X0, Y0, Z0); in TrilinearInterpFloat() 484 d010 = DENS(X0, Y1, Z0); in TrilinearInterpFloat() 487 d100 = DENS(X1, Y0, Z0); in TrilinearInterpFloat() 489 d110 = DENS(X1, Y1, Z0); in TrilinearInterpFloat() 526 register int X0, X1, Y0, Y1, Z0, Z1; in TrilinearInterp16() local 554 Z0 = p -> opta[0] * z0; in TrilinearInterp16() 555 Z1 = Z0 + (Input[2] == 0xFFFFU ? 0 : p->opta[0]); in TrilinearInterp16() [all …]
/external/icu/icu4c/source/test/testdata/
D	regextst.txt	1338 "^([a-zA-Z0-9_\-\.]+)@((\[[0-9]{1,3}\.[0-9]{1,3}\.[0-9]{1,3}\.)\|(([a-zA-Z0-9\-]+\.)+))([a-zA-Z]{2,4… 1339 "^([a-zA-Z0-9_\-\.]+)@((\[[0-9]{1,3}\.[0-9]{1,3}\.[0-9]{1,3}\.)\|(([a-zA-Z0-9\-]+\.)+))([a-zA-Z]{2,4… 1340 "^([a-zA-Z0-9_\-\.]+)@((\[[0-9]{1,3}\.[0-9]{1,3}\.[0-9]{1,3}\.)\|(([a-zA-Z0-9\-]+\.)+))([a-zA-Z]{2,4… 1341 "^([a-zA-Z0-9_\-\.]+)@((\[[0-9]{1,3}\.[0-9]{1,3}\.[0-9]{1,3}\.)\|(([a-zA-Z0-9\-]+\.)+))([a-zA-Z]{2,4… 1342 "^([a-zA-Z0-9_\-\.]+)@((\[[0-9]{1,3}\.[0-9]{1,3}\.[0-9]{1,3}\.)\|(([a-zA-Z0-9\-]+\.)+))([a-zA-Z]{2,4… 1343 "^([a-zA-Z0-9_\-\.]+)@((\[[0-9]{1,3}\.[0-9]{1,3}\.[0-9]{1,3}\.)\|(([a-zA-Z0-9\-]+\.)+))([a-zA-Z]{2,4… 1453 "^(http\|https\|ftp)\://[a-zA-Z0-9\-\.]+\.[a-zA-Z]{2,3}(:[a-zA-Z0-9])?/?([a-zA-Z0-9\-\._\?\,\'/\\\+\… 1454 "^(http\|https\|ftp)\://[a-zA-Z0-9\-\.]+\.[a-zA-Z]{2,3}(:[a-zA-Z0-9])?/?([a-zA-Z0-9\-\._\?\,\'/\\\+\… 1455 "^(http\|https\|ftp)\://[a-zA-Z0-9\-\.]+\.[a-zA-Z]{2,3}(:[a-zA-Z0-9])?/?([a-zA-Z0-9\-\._\?\,\'/\\\+\… 1456 "^(http\|https\|ftp)\://[a-zA-Z0-9\-\.]+\.[a-zA-Z]{2,3}(:[a-zA-Z0-9])?/?([a-zA-Z0-9\-\._\?\,\'/\\\+\… [all …]
/external/llvm/test/Transforms/StraightLineStrengthReduce/
D	slsr-add.ll	8 ; [[BASIS:%[a-zA-Z0-9]+]] = add i32 %b, %s 22 ; CHECK: [[t1:%[a-zA-Z0-9]+]] = add i32 %b, %s2 26 ; CHECK: [[t2:%[a-zA-Z0-9]+]] = add i32 [[t1]], %s2 38 ; CHECK: [[t1:%[a-zA-Z0-9]+]] = add i32 %s, %b 42 ; CHECK: [[bump:%[a-zA-Z0-9]+]] = mul i32 %s, 3 43 ; CHECK: [[t2:%[a-zA-Z0-9]+]] = add i32 [[t1]], [[bump]] 67 ; CHECK: [[t1:%[a-zA-Z0-9]+]] = add i32 %b, %s6 72 ; CHECK: [[bump:%[a-zA-Z0-9]+]] = shl i32 %s, 1 73 ; CHECK: [[t2:%[a-zA-Z0-9]+]] = sub i32 [[t1]], [[bump]] 78 ; CHECK: [[t3:%[a-zA-Z0-9]+]] = sub i32 [[t2]], [[bump]] [all …]
/external/llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/
D	split-gep.ll	27 …ementptr [1024 x %struct.S], [1024 x %struct.S]* @struct_array, i64 0, i64 %{{[a-zA-Z0-9]+}}, i32 1 46 … float]], [32 x [32 x float]]* @float_2d_array, i64 0, i64 %{{[a-zA-Z0-9]+}}, i64 %{{[a-zA-Z0-9]+}} 47 ; CHECK: getelementptr inbounds float, float* %{{[a-zA-Z0-9]+}}, i64 32 67 …_PTR:%[a-zA-Z0-9]+]] = getelementptr [32 x [32 x float]], [32 x [32 x float]]* @float_2d_array, i6… 92 …TR_1:%[a-zA-Z0-9]+]] = getelementptr [32 x [32 x float]], [32 x [32 x float]]* @float_2d_array, i6… 94 …TR_2:%[a-zA-Z0-9]+]] = getelementptr [32 x [32 x float]], [32 x [32 x float]]* @float_2d_array, i6… 112 …_PTR:%[a-zA-Z0-9]+]] = getelementptr [32 x [32 x float]], [32 x [32 x float]]* @float_2d_array, i6… 127 …ECK: [[BASE_PTR:%[a-zA-Z0-9]+]] = getelementptr [32 x [32 x float]], [32 x [32 x float]]* @float_2… 146 ; CHECK: getelementptr inbounds float, float* %{{[a-zA-Z0-9]+}}, i64 8 156 ; CHECK: %[[j2:[a-zA-Z0-9]+]] = sub i64 0, %j [all …]
D	split-gep-and-gvn.ll	`54 …a-zA-Z0-9]+]] = getelementptr inbounds [32 x [32 x float]], [32 x [32 x float]] addrspace(3)* @arr… 97 …a-zA-Z0-9]+]] = getelementptr inbounds [32 x [32 x float]], [32 x [32 x float]] addrspace(3)* @arr… 147 …a-zA-Z0-9]+]] = getelementptr inbounds [32 x [32 x float]], [32 x [32 x float]] addrspace(3)* @arr… 193 …a-zA-Z0-9]+]] = getelementptr inbounds [32 x [32 x float]], [32 x [32 x float]] addrspace(3)* @arr…`
/external/llvm/test/CodeGen/PowerPC/
D	ppc64-gep-opt.ll	33 ; CHECK-NoAA: [[PTR0:%[a-zA-Z0-9]+]] = ptrtoint [240 x %struct]* %string to i64 34 ; CHECK-NoAA: [[PTR1:%[a-zA-Z0-9]+]] = mul i64 %idxprom, 96 35 ; CHECK-NoAA: [[PTR2:%[a-zA-Z0-9]+]] = add i64 [[PTR0]], [[PTR1]] 45 ; CHECK-UseAA: [[PTR0:%[a-zA-Z0-9]+]] = bitcast [240 x %struct]* %string to i8* 46 ; CHECK-UseAA: [[IDX:%[a-zA-Z0-9]+]] = mul i64 %idxprom, 96 47 ; CHECK-UseAA: [[PTR1:%[a-zA-Z0-9]+]] = getelementptr i8, i8* [[PTR0]], i64 [[IDX]] 84 ; CHECK-NoAA: add i64 [[TMP:%[a-zA-Z0-9]+]], 528 87 ; CHECK-NoAA: {{%sunk[a-zA-Z0-9]+}} = add i64 [[TMP]], 532 89 ; CHECK-NoAA: {{%sunk[a-zA-Z0-9]+}} = add i64 [[TMP]], 528 92 ; CHECK-UseAA: [[PTR0:%[a-zA-Z0-9]+]] = getelementptr [all …]
D	ppc64-toc.ll	`63 ; CHECK-NEXT: .tc {{[\._a-zA-Z0-9]+}}[TC],{{[\._a-zA-Z0-9]+}} 65 ; CHECK-NEXT: .tc {{[\._a-zA-Z0-9]+}}[TC],{{[\._a-zA-Z0-9]+}} 67 ; CHECK-NEXT: .tc {{[\._a-zA-Z0-9]+}}[TC],{{[\._a-zA-Z0-9]+}} 69 ; CHECK-NEXT: .tc {{[\._a-zA-Z0-9]+}}[TC],{{[\._a-zA-Z0-9]+}}`
D	2012-09-16-TOC-entry-check.ll	`25 ; CHECK-NEXT: .tc {{[\._a-zA-Z0-9]+}}[TC],{{[\._a-zA-Z0-9]+}} 27 ; CHECK-NEXT: .tc {{[\._a-zA-Z0-9]+}}[TC],{{[\._a-zA-Z0-9]+}}`
D	i1-to-double.ll	`12 ; CHECK: li 3, .LCP[[L1:[A-Z0-9_]+]]@l 17 ; CHECK: li 3, .LCP[[L2:[A-Z0-9_]+]]@l`
/external/llvm/test/Transforms/LoopVectorize/
D	if-pred-stores.ll	65 ; UNROLL: %[[IND:[a-zA-Z0-9]+]] = add i64 %{{.}}, 0 66 ; UNROLL: %[[IND1:[a-zA-Z0-9]+]] = add i64 %{{.}}, 1 67 ; UNROLL: %[[v0:[a-zA-Z0-9]+]] = getelementptr inbounds i32, i32* %f, i64 %[[IND]] 68 ; UNROLL: %[[v1:[a-zA-Z0-9]+]] = getelementptr inbounds i32, i32* %f, i64 %[[IND1]] 69 ; UNROLL: %[[v2:[a-zA-Z0-9]+]] = load i32, i32* %[[v0]], align 4 70 ; UNROLL: %[[v3:[a-zA-Z0-9]+]] = load i32, i32* %[[v1]], align 4 71 ; UNROLL: %[[v4:[a-zA-Z0-9]+]] = icmp sgt i32 %[[v2]], 100 72 ; UNROLL: %[[v5:[a-zA-Z0-9]+]] = icmp sgt i32 %[[v3]], 100 73 ; UNROLL: %[[v6:[a-zA-Z0-9]+]] = add nsw i32 %[[v2]], 20 74 ; UNROLL: %[[v7:[a-zA-Z0-9]+]] = add nsw i32 %[[v3]], 20 [all …]
D	store-shuffle-bug.ll	`22 ; CHECK: [[VAR1:%[a-zA-Z0-9.]+]] = load <4 x i32> 23 ; CHECK: [[VAR2:%[a-zA-Z0-9.]+]] = load <4 x i32> 24 ; CHECK: [[VAR3:%[a-zA-Z0-9]+]] = add nsw <4 x i32> [[VAR2]], [[VAR1]] 26 ; CHECK: [[VAR4:%[a-zA-Z0-9.]+]] = load <4 x i32>`
/external/llvm/test/CodeGen/AArch64/
D	aarch64-gep-opt.ll	39 ; CHECK-NoAA: [[PTR0:%[a-zA-Z0-9]+]] = ptrtoint [240 x %struct]* %string to i64 40 ; CHECK-NoAA: [[PTR1:%[a-zA-Z0-9]+]] = mul i64 %idxprom, 96 41 ; CHECK-NoAA: [[PTR2:%[a-zA-Z0-9]+]] = add i64 [[PTR0]], [[PTR1]] 51 ; CHECK-UseAA: [[PTR0:%[a-zA-Z0-9]+]] = bitcast [240 x %struct]* %string to i8* 52 ; CHECK-UseAA: [[IDX:%[a-zA-Z0-9]+]] = mul i64 %idxprom, 96 53 ; CHECK-UseAA: [[PTR1:%[a-zA-Z0-9]+]] = getelementptr i8, i8* [[PTR0]], i64 [[IDX]] 93 ; CHECK-NoAA: add i64 [[TMP:%[a-zA-Z0-9]+]], 528 96 ; CHECK-NoAA: {{%sunk[a-zA-Z0-9]+}} = add i64 [[TMP]], 532 98 ; CHECK-NoAA: {{%sunk[a-zA-Z0-9]+}} = add i64 [[TMP]], 528 101 ; CHECK-UseAA: [[PTR0:%[a-zA-Z0-9]+]] = getelementptr [all …]
D	arm64-neon-simd-ldst-one.ll	46 ; CHECK: adrp {{x[0-9]+}}, .{{[A-Z0-9_]+}} 47 ; CHECK: ldr {{q[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:.{{[A-Z0-9_]+}}] 55 ; CHECK: adrp {{x[0-9]+}}, .{{[A-Z0-9_]+}} 56 ; CHECK: ldr {{q[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:.{{[A-Z0-9_]+}}] 64 ; CHECK: adrp {{x[0-9]+}}, .{{[A-Z0-9_]+}} 65 ; CHECK: ldr {{q[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:.{{[A-Z0-9_]+}}] 73 ; CHECK: adrp {{x[0-9]+}}, .{{[A-Z0-9_]+}} 74 ; CHECK: ldr {{q[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:.{{[A-Z0-9_]+}}] 82 ; CHECK: adrp {{x[0-9]+}}, .{{[A-Z0-9_]+}} 83 ; CHECK: ldr {{q[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:.{{[A-Z0-9_]+}}] [all …]
/external/llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/
D	split-gep-and-gvn-addrspace-addressing-modes.ll	8 …zA-Z0-9]+]] = getelementptr inbounds [4096 x [32 x float]], [4096 x [32 x float]] addrspace(2)* @a… 40 …-zA-Z0-9]+]] = getelementptr inbounds [4096 x [4 x float]], [4096 x [4 x float]] addrspace(2)* @ar… 43 …]], [4096 x [4 x float]] addrspace(2)* @array2, i64 0, i64 %{{[a-zA-Z0-9]+}}, i64 %{{[a-zA-Z0-9]+}} 44 …]], [4096 x [4 x float]] addrspace(2)* @array2, i64 0, i64 %{{[a-zA-Z0-9]+}}, i64 %{{[a-zA-Z0-9]+}} 73 …A-Z0-9]+]] = getelementptr inbounds [4096 x [4 x float]], [4096 x [4 x float]] addrspace(3)* @lds_…
/external/llvm/test/CodeGen/XCore/
D	exception.ll	`43 ; CHECK-NEXT: [[START:.L[a-zA-Z0-9_]+]] 46 ; CHECK: .cfi_lsda 0, [[LSDA:.L[a-zA-Z0-9_]+]] 60 ; CHECK: [[PRE_G:.L[a-zA-Z0-9_]+]] 62 ; CHECK: [[POST_G:.L[a-zA-Z0-9_]+]] 63 ; CHECK: [[RETURN:.L[a-zA-Z0-9_]+]] 72 ; CHECK: {{.L[a-zA-Z0-9_]+}} 73 ; CHECK: [[LANDING:.L[a-zA-Z0-9_]+]] 95 ; CHECK: [[END:.L[a-zA-Z0-9_]+]]`
/external/mdnsresponder/mDNSShared/
D	dnsextd_lexer.l	`78 [a-zA-Z0-9]+(\.[a-zA-Z0-9]+)* yylval.string = strdup(yytext); return HOSTNAME; 79 [a-zA-Z0-9\.]+([a-zA-Z0-9\.]+)* yylval.string = strdup(yytext); return DOMAINNAME;`
/external/curl/m4/
D	xc-translit.m4	35 [`echo "$1" \| sed 's/[[^a-zA-Z0-9_]]/_/g'`]) 47 [`echo "$1" \| sed 's/[[$2]]/p/g' \| sed 's/[[^a-zA-Z0-9_]]/_/g'`])]) 58 [[^a-zA-Z0-9_]], [_]), 74 [[^a-zA-Z0-9_]], [_]), 91 sed 's/[[^A-Z0-9_]]/_/g'`]) 106 sed 's/[[^A-Z0-9_]]/_/g'`])]) 120 [[^A-Z0-9_]], [_]), 138 [[^A-Z0-9_]], [_]),
/external/opencv3/modules/calib3d/src/
D	p3p.cpp	59 double mu0, double mv0, double X0, double Y0, double Z0, in solve() argument 66 int n = solve(Rs, ts, mu0, mv0, X0, Y0, Z0, mu1, mv1, X1, Y1, Z1, mu2, mv2, X2, Y2, Z2); in solve() 96 double mu0, double mv0, double X0, double Y0, double Z0, in solve() argument 120 distances[1] = sqrt( (X0 - X2) * (X0 - X2) + (Y0 - Y2) * (Y0 - Y2) + (Z0 - Z2) * (Z0 - Z2) ); in solve() 121 distances[2] = sqrt( (X0 - X1) * (X0 - X1) + (Y0 - Y1) * (Y0 - Y1) + (Z0 - Z1) * (Z0 - Z1) ); in solve() 148 if (!align(M_orig, X0, Y0, Z0, X1, Y1, Z1, X2, Y2, Z2, R[nb_solutions], t[nb_solutions])) in solve() 262 double X0, double Y0, double Z0, in align() argument 272 C_start[2] = (Z0 + Z1 + Z2) / 3; in align() 279 …s[2 * 3 + j] = (Z0 * M_end[0][j] + Z1 * M_end[1][j] + Z2 * M_end[2][j]) / 3 - C_end[j] * C_start[2… in align()
D	p3p.h	`15 double mu0, double mv0, double X0, double Y0, double Z0, 19 double mu0, double mv0, double X0, double Y0, double Z0, 50 double X0, double Y0, double Z0,`

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