Searched refs:_abs (Results 1 – 4 of 4) sorted by relevance
| /external/opencv3/modules/cudaarithm/src/cuda/ |
| D | absdiff_mat.cu | 59 __device__ __forceinline__ int _abs(int a) in _abs() function
63 __device__ __forceinline__ float _abs(float a) in _abs() function
67 __device__ __forceinline__ double _abs(double a) in _abs() function
76 return saturate_cast<T>(_abs(a - b)); in operator ()()
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| /external/llvm/test/Transforms/InstSimplify/ |
| D | call-callconv.ll | 6 define arm_aapcscc i32 @_abs(i32 %i) nounwind readnone {
7 ; CHECK: _abs
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_disasm.c | 113 char *_abs[2] = { variable
627 err |= control (file, "abs", _abs, __abs, NULL); in src_da1()
653 err |= control (file, "abs", _abs, __abs, NULL); in src_ia1()
681 err |= control (file, "abs", _abs, __abs, NULL); in src_da16()
732 err |= control (file, "abs", _abs, inst->bits1.da3src.src0_abs, NULL); in src0_3src()
783 err |= control (file, "abs", _abs, inst->bits1.da3src.src1_abs, NULL); in src1_3src()
834 err |= control (file, "abs", _abs, inst->bits1.da3src.src2_abs, NULL); in src2_3src()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfoV4.td | 3395 let CextOpcode = CextOp, BaseOpcode = CextOp#_abs in {
3497 let CextOpcode = CextOp, BaseOpcode = CextOp#_abs in {
3546 let BaseOpcode = BaseOp#_abs;
3555 let BaseOpcode = BaseOp#_abs in {
3698 def _abs : T_LoadAbs_Pred <mnemonic, RC, MajOp, PredNot, 0>;
3706 let CextOpcode = CextOp, BaseOpcode = CextOp#_abs in {
3708 def L4_#NAME#_abs: T_LoadAbs <mnemonic, RC, ImmOp, MajOp>;
3743 let BaseOpcode = BaseOp#_abs;
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