| /external/llvm/test/CodeGen/AArch64/ |
| D | postra-mi-sched.ll | 1 ; RUN: llc < %s -O3 -march=aarch64 -mcpu=cortex-a53 | FileCheck %s
3 ; With cortex-a53, each of fmul and fcvt have latency of 6 cycles. After the
|
| D | aarch64-fix-cortex-a53-835769.ll | 5 ; cases could break if instruction scheduling heuristics for cortex-a53 change
6 ; RUN: llc < %s -mcpu=cortex-a53 -aarch64-fix-cortex-a53-835769=1 -stats 2>&1 \
8 ; RUN: llc < %s -mcpu=cortex-a53 -aarch64-fix-cortex-a53-835769=0 -stats 2>&1 \
16 ; RUN: llc < %s -mcpu=cortex-a53 | FileCheck %s --check-prefix CHECK-BASIC-PASS-DISABLED
534 ; CHECK: 11 aarch64-fix-cortex-a53-835769 - Number of Nops added to work around erratum 835769
|
| D | remat.ll | 3 ; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=cortex-a53 -o - %s | FileCheck %s
|
| D | arm64-misched-forwarding-A53.ll | 2 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -pre-RA-sched=source -enable-misched -ver…
|
| D | cpus.ll | 6 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a53 2>&1 | FileCheck %s
|
| D | arm64-triv-disjoint-mem-access.ll | 1 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -enable-aa-sched-mi | FileCheck %s
|
| D | aarch64-DAGCombine-findBetterNeighborChains-crash.ll | 43 attributes #1 = { nounwind "target-cpu"="cortex-a53" }
|
| D | aarch64-address-type-promotion-assertion.ll | 1 ; RUN: llc -O3 -mcpu=cortex-a53 -mtriple=aarch64--linux-gnu %s -o - | FileCheck %s
|
| D | aarch64-loop-gep-opt.ll | 1 ; RUN: llc -O3 -aarch64-gep-opt=true -print-after=codegenprepare -mcpu=cortex-a53 < %s >%t 2>&1 &&…
|
| D | arm64-misched-basic-A53.ll | 2 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -pre-RA-sched=source -enable-misched -ver…
114 ; [ARM64] Cortex-a53 schedule mode can't handle NEON post-increment load
|
| D | aarch64-a57-fp-load-balancing.ll | 3 ; RUN: llc < %s -mcpu=cortex-a53 -aarch64-a57-fp-load-balancing-override=1 -aarch64-a57-fp-load-bal…
4 ; RUN: llc < %s -mcpu=cortex-a53 -aarch64-a57-fp-load-balancing-override=2 -aarch64-a57-fp-load-bal…
|
| D | aarch64-gep-opt.ll | 3 ; RUN: llc -O3 -aarch64-gep-opt=true -print-after=codegenprepare -mcpu=cortex-a53 < %s >%t 2>&1 && …
|
| /external/v8/test/mjsunit/harmony/ |
| D | sharedarraybuffer.js | 379 var a53 = new Int8Array(b, 2, 2)
385 assertArrayPrefix([0x0a, 0x0a], a53)
396 a53.set(a5)
408 a5.set(a53)
|
| /external/v8/test/mjsunit/compiler/ |
| D | osr-regress-max-locals.js | 38 a51, a52, a53, a54, a55, a56, a57, a58, a59, a60,
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64.td | 102 def ProcA53 : SubtargetFeature<"a53", "ARMProcFamily", "CortexA53",
134 def : ProcessorModel<"cortex-a53", CortexA53Model, [ProcA53]>;
|
| /external/v8/test/mjsunit/es6/ |
| D | typedarray.js | 478 var a53 = new Int8Array(b, 2, 2)
484 assertArrayPrefix([0x0a, 0x0a], a53)
495 a53.set(a5)
507 a5.set(a53)
|
| /external/v8/test/mjsunit/ |
| D | external-array.js | 568 var a53 = new Int8Array(b, 2, 2) variable
574 assertArrayPrefix([0x0a, 0x0a], a53)
585 a53.set(a5)
597 a5.set(a53)
|
| /external/deqp/framework/delibs/cmake/ |
| D | toolchain-android-r11.cmake | 99 set(TARGET_LINKER_FLAGS "-Wl,--fix-cortex-a53-835769 -Wl,--fix-cortex-a53-835769 -march=armv8-a")
|
| D | toolchain-android-r10e.cmake | 99 set(TARGET_LINKER_FLAGS "-Wl,--fix-cortex-a53-835769 -Wl,--fix-cortex-a53-835769 -march=armv8-a")
|
| /external/llvm/lib/Target/ARM/ |
| D | ARM.td | 248 def ProcA53 : SubtargetFeature<"a53", "ARMProcFamily", "CortexA53",
621 def : ProcNoItin<"cortex-a53", [ARMv8a, ProcA53,
|
| /external/llvm/include/llvm/Support/ |
| D | ARMTargetParser.def | 212 ARM_CPU_NAME("cortex-a53", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, true, AEK_CRC)
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | invalid-thumbv7.txt | 2 # RUN: not llvm-mc -disassemble %s -mcpu cortex-a53 -triple thumbv8 2>&1 | FileCheck %s
|
| /external/elfutils/tests/ |
| D | run-strings-test.sh | 85 testfile4: a53 __tib
|
| /external/v8/test/webkit/ |
| D | dfg-inline-arguments-reset-changetype-expected.txt | 82 PASS argsToStr(baz("a" + __i, __i + 2, "c" + __i)) is "[object Arguments]: a53, a53, c53"
|
| D | dfg-inline-arguments-reset-expected.txt | 82 PASS argsToStr(baz("a" + __i, "b" + __i, "c" + __i)) is "[object Arguments]: a53, a53, c53"
|