Searched refs:addRegMask (Results 1 – 10 of 10) sorted by relevance
149 const MachineInstrBuilder &addRegMask(const uint32_t *Mask) const { in addRegMask() function
393 MIB.addRegMask(RM->getRegMask()); in AddOperand()
2266 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC)); in ARMEmitLibcall()2417 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC)); in SelectCall()
7163 MIB.addRegMask(RI.getNoPreservedMask()); in EmitSjLjDispatchBlock()
1318 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC)); in fastLowerCall()
1575 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC)); in fastLowerCall()
8439 MIB.addRegMask(TRI->getNoPreservedMask()); in emitEHSjLjSetJmp()
3143 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC)); in fastLowerCall()
21811 .addRegMask(RegMask) in EmitLoweredSegAlloca()21819 .addRegMask(RegMask) in EmitLoweredSegAlloca()21828 .addRegMask(RegMask) in EmitLoweredSegAlloca()21950 MIB.addReg(X86::RAX, RegState::ImplicitDefine).addRegMask(RegMask); in EmitLoweredTLSCall()21961 MIB.addReg(X86::EAX, RegState::ImplicitDefine).addRegMask(RegMask); in EmitLoweredTLSCall()21972 MIB.addReg(X86::EAX, RegState::ImplicitDefine).addRegMask(RegMask); in EmitLoweredTLSCall()22092 MIB.addRegMask(RegInfo->getNoPreservedMask()); in emitEHSjLjSetJmp()