Searched refs:apsr (Results 1 – 16 of 16) sorted by relevance
| /external/llvm/test/MC/ARM/ |
| D | thumb2-mclass.s | 13 mrs r0, apsr
25 @ CHECK: mrs r0, apsr @ encoding: [0xef,0xf3,0x00,0x80]
41 msr apsr, r0
57 @ CHECK-V6M: msr apsr, r0 @ encoding: [0x80,0xf3,0x00,0x88]
58 @ CHECK-V6M: msr apsr, r0 @ encoding: [0x80,0xf3,0x00,0x88]
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| D | basic-arm-instructions.s | 1410 mrs r8, apsr
1413 @ CHECK: mrs r8, apsr @ encoding: [0x00,0x80,0x0f,0xe1]
1414 @ CHECK: mrs r8, apsr @ encoding: [0x00,0x80,0x0f,0xe1]
1423 msr apsr, #5
1424 msr apsr, $5
1425 msr apsr, 5
1471 msr apsr, r0
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| D | basic-thumb2-instructions.s | 1547 mrs r8, apsr
1551 @ CHECK: mrs r8, apsr @ encoding: [0xef,0xf3,0x00,0x88]
1552 @ CHECK: mrs r8, apsr @ encoding: [0xef,0xf3,0x00,0x88]
1559 msr apsr, r1
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| /external/llvm/test/CodeGen/ARM/ |
| D | copy-cpsr.ll | 23 ; CHECK-ARM: mrs [[TMP:r[0-9]+]], apsr @ encoding: [0x00,0x{{[0-9a-f]}}0,0x0f,0xe1]
27 ; to overlap for the apsr case, so it's definitely worth checking both.
28 ; CHECK-THUMB: mrs [[TMP:r[0-9]+]], apsr @ encoding: [0xef,0xf3,0x00,0x8{{[0-9a-f]}}]
29 ; CHECK-THUMB: msr {{APSR|apsr}}_nzcvq, [[TMP]] @ encoding: [0x8{{[0-9a-f]}},0xf3,0x00,0x88]
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| D | special-reg-acore.ll | 8 ; ACORE: mrs r0, apsr
16 ; ACORE: mrs r0, apsr
63 !0 = !{!"apsr"}
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| D | special-reg.ll | 23 ; ARM: mrs r0, apsr
76 !2 = !{!"apsr"}
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| D | special-reg-mcore.ll | 11 ; MCORE: mrs r0, apsr
118 !0 = !{!"apsr"}
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| /external/compiler-rt/test/builtins/Unit/arm/ |
| D | call_apsr.S | 28 mrs r0, apsr
41 mrs r0, apsr
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb-MSR-MClass.txt | 7 # CHECK: mrs r0, apsr
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| D | thumb-tests.txt | 305 # CHECK: mrs r0, apsr
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| D | thumb2.txt | 1108 # CHECK: mrs r8, apsr
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| D | basic-arm-instructions.txt | 837 # CHECK: mrs r8, apsr
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| /external/llvm/lib/Target/ARM/ |
| D | ARMRegisterInfo.td | 164 def APSR : ARMReg<1, "apsr">;
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| D | ARMInstrThumb2.td | 4005 def t2MRS_AR : T2I<(outs GPR:$Rd), (ins), NoItinerary, "mrs", "\t$Rd, apsr",
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| D | ARMInstrInfo.td | 5156 "mrs", "\t$Rd, apsr", []> {
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| /external/valgrind/VEX/priv/ |
| D | guest_arm_toIR.c | 16030 IRTemp apsr = synthesise_APSR(); in disInstr_ARM_WRK() local
16031 putIRegA( rD, mkexpr(apsr), condT, Ijk_Boring ); in disInstr_ARM_WRK()
21386 IRTemp apsr = synthesise_APSR(); in disInstr_THUMB_WRK() local
21387 putIRegT( rD, mkexpr(apsr), condT ); in disInstr_THUMB_WRK()
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