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Searched refs:bitsGT (Results 1 – 17 of 17) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DValueTypes.h195 bool bitsGT(EVT VT) const { in bitsGT() function
DMachineValueType.h525 bool bitsGT(MVT VT) const { in bitsGT() function
/external/llvm/lib/Target/ARM/
DARMSelectionDAGInfo.cpp94 if (Src.getValueType().bitsGT(MVT::i32)) in EmitSpecializedLibcall()
DARMISelLowering.cpp8465 unsigned ExtOp = VT.bitsGT(tmp.getValueType()) ? ISD::ANY_EXTEND : ISD::TRUNCATE; in AddCombineToVPADDL()
/external/llvm/lib/Target/X86/
DX86SelectionDAGInfo.cpp138 if (AVT.bitsGT(MVT::i8)) { in EmitTargetCodeForMemset()
DX86FastISel.cpp3259 if (DstVT.bitsGT(SrcVT)) in fastSelectInstruction()
DX86ISelLowering.cpp12726 if (DestVT.bitsGT(MVT::f64)) in LowerUINT_TO_FP_i32()
13564 if (SrcVT.bitsGT(VT)) { in LowerFCOPYSIGN()
16106 if (MaskVT.bitsGT(Mask.getSimpleValueType())) { in getMaskNode()
18527 if (EltVT != MVT::i64 && EltVT.bitsGT(MVT::i32)) in LowerScalarVariableShift()
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAG.cpp1012 return VT.bitsGT(Op.getValueType()) ? in getAnyExtOrTrunc()
1018 return VT.bitsGT(Op.getValueType()) ? in getSExtOrTrunc()
1024 return VT.bitsGT(Op.getValueType()) ? in getZExtOrTrunc()
3098 assert(Operand.getValueType().bitsGT(VT) && in getNode()
3108 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) in getNode()
3375 if (ScalarVT.isInteger() && ScalarVT.bitsGT(InSVT)) in FoldConstantVectorArithmetic()
3448 if (SVT.bitsGT(VT.getScalarType())) in getNode()
4197 if (VT.bitsGT(LVT)) in FindOptimalMemOpLowering()
4523 if (MemOps[i].bitsGT(LargestVT)) in getMemsetStores()
DFastISel.cpp330 } else if (IdxVT.bitsGT(PtrVT)) { in getRegForGEPIndex()
1632 if (DstVT.bitsGT(SrcVT)) in selectOperator()
DDAGCombiner.cpp2997 if (!LoadedVT.bitsGT(ExtVT) || !ExtVT.isRound()) in isAndLoadExtLoad()
5059 if (VT.bitsGT(VT0)) in visitSELECT()
6247 if (VT.bitsGT(Op.getValueType())) in visitZERO_EXTEND()
6304 } else if (SrcVT.bitsGT(VT)) { in visitZERO_EXTEND()
6323 } else if (X.getValueType().bitsGT(VT)) { in visitZERO_EXTEND()
6558 if (TruncOp.getValueType().bitsGT(VT)) in visitANY_EXTEND()
6573 } else if (X.getValueType().bitsGT(VT)) { in visitANY_EXTEND()
7034 if (N0.getOperand(0).getValueType().bitsGT(VT)) in visitTRUNCATE()
12067 InVal = OpVT.bitsGT(InVal.getValueType()) ? in visitINSERT_VECTOR_ELT()
12117 if (ResultVT.bitsGT(VecEltVT)) { in ReplaceExtractVectorEltOfLoadWithNarrowedLoad()
[all …]
DTargetLowering.cpp1599 if (Op0.getValueType().bitsGT(VT)) in SimplifySetCC()
DLegalizeDAG.cpp2579 } else if (DestVT.bitsGT(MVT::f64)) { in ExpandLegalINT_TO_FP()
/external/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp473 return VT.bitsGT(MVT::i32) && Align % 4 == 0; in allowsMisalignedMemoryAccesses()
DR600ISelLowering.cpp1923 InVal = OpVT.bitsGT(InVal.getValueType()) ? in PerformDAGCombine()
/external/llvm/lib/CodeGen/
DCodeGenPrepare.cpp4422 if (!LoadResultVT.bitsGT(TruncVT) || !TruncVT.isRound() || in optimizeLoadExt()
/external/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp4799 } else if (IdxVT.bitsGT(PtrVT)) in getRegForGEPIndex()
DAArch64ISelLowering.cpp3719 else if (SrcVT.bitsGT(VT)) in LowerFCOPYSIGN()