Searched refs:conv2 (Results 1 – 25 of 93) sorted by relevance
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| /external/llvm/test/CodeGen/ARM/ |
| D | fast-isel-icmp.ll | 16 %conv2 = zext i1 %cmp to i32
17 ret i32 %conv2
31 %conv2 = zext i1 %cmp to i32
32 ret i32 %conv2
46 %conv2 = zext i1 %cmp to i32
47 ret i32 %conv2
61 %conv2 = zext i1 %cmp to i32
62 ret i32 %conv2
76 %conv2 = zext i1 %cmp to i32
77 ret i32 %conv2
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| D | noreturn.ll | 24 %conv2 = trunc i64 %mul to i32
25 %conv3 = sext i32 %conv2 to i64
34 ret i32 %conv2
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| D | longMAC.ll | 33 %conv2 = zext i32 %c to i64
34 %add = add i64 %mul, %conv2
44 %conv2 = sext i32 %c to i64
45 %add = add nsw i64 %mul, %conv2
86 %conv2 = sext i32 %c to i64
88 %mul4 = mul nsw i64 %conv3, %conv2
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| D | smml.ll | 8 %conv2 = sext i32 %c to i64
9 %mul = mul nsw i64 %conv2, %conv1
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| /external/llvm/test/Transforms/InstCombine/ |
| D | udivrem-change-width.ll | 8 %conv2 = zext i8 %b to i32
9 %div = udiv i32 %conv, %conv2
18 %conv2 = zext i8 %b to i32
19 %div = urem i32 %conv, %conv2
28 %conv2 = zext i8 %b to i32
29 %div = udiv i32 %conv, %conv2
38 %conv2 = zext i8 %b to i32
39 %div = urem i32 %conv, %conv2
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| D | pr8547.ll | 17 %conv2 = lshr i32 %shl, 24
19 ; CHECK: %conv2 = and i32 %0, 64
20 %tobool = icmp eq i32 %conv2, 0
24 …printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %conv2) nounwind
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| D | overflow.ll | 11 %conv2 = sext i32 %b to i64
12 %add = add nsw i64 %conv2, %conv
36 %conv2 = sext i32 %b to i64
37 %add = add nsw i64 %conv2, %conv
63 %conv2 = sext i32 %b to i64
64 %add = add nsw i64 %conv2, %conv
84 %conv2 = sext i8 %b to i32
85 %add = add nsw i32 %conv2, %conv
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| D | cos-1.ll | 25 %conv2 = fptrunc double %cos to float
27 ret float %conv2
36 %conv2 = fptrunc double %cos to float
37 ret float %conv2
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| /external/llvm/test/CodeGen/Hexagon/ |
| D | extload-combine.ll | 23 %conv2 = zext i16 %0 to i64
24 ret i64 %conv2
34 %conv2 = sext i16 %0 to i64
35 ret i64 %conv2
45 %conv2 = zext i8 %0 to i64
46 ret i64 %conv2
56 %conv2 = sext i8 %0 to i64
57 ret i64 %conv2
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| D | memops.ll | 22 %conv2 = trunc i32 %add to i8
23 store i8 %conv2, i8* %p, align 1
34 %conv2 = trunc i32 %sub to i8
35 store i8 %conv2, i8* %p, align 1
99 %conv2 = trunc i32 %add to i8
100 store i8 %conv2, i8* %add.ptr, align 1
112 %conv2 = trunc i32 %sub to i8
113 store i8 %conv2, i8* %add.ptr, align 1
181 %conv2 = trunc i32 %add to i8
182 store i8 %conv2, i8* %add.ptr, align 1
[all …]
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| D | memops2.ll | 10 %conv2 = zext i16 %0 to i32
11 %sub = add nsw i32 %conv2, 65535
25 %conv2 = trunc i32 %sub to i16
26 store i16 %conv2, i16* %add.ptr1, align 2
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| D | bit-loop.ll | 27 %conv2 = zext i16 %s to i32
28 %add.ptr = getelementptr inbounds i16, i16* %1, i32 %conv2
29 %add.ptr.sum = add nuw nsw i32 %conv2, 1
31 %add.ptr.sum50 = add nuw nsw i32 %conv2, 2
33 %add.ptr.sum51 = add nuw nsw i32 %conv2, 3
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| D | cext.ll | 13 %conv2 = trunc i32 %mul to i8
14 ret i8 %conv2
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| D | fusedandshift.ll | 13 %conv2 = trunc i32 %and1 to i16
14 store i16 %conv2, i16* %b, align 2
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| D | cexti16.ll | 13 %conv2 = trunc i32 %mul to i16
14 ret i16 %conv2
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| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-fast-isel-icmp.ll | 180 %conv2 = zext i1 %cmp to i32
181 ret i32 %conv2
191 %conv2 = zext i1 %cmp to i32
192 ret i32 %conv2
203 %conv2 = zext i1 %cmp to i32
204 ret i32 %conv2
215 %conv2 = zext i1 %cmp to i32
216 ret i32 %conv2
227 %conv2 = zext i1 %cmp to i32
228 ret i32 %conv2
[all …]
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| D | arm64-shifted-sext.ll | 13 %conv2 = trunc i32 %shl to i16
14 ret i16 %conv2
25 %conv2 = trunc i32 %shr4 to i16
26 ret i16 %conv2
37 %conv2 = trunc i32 %shl to i16
38 ret i16 %conv2
50 %conv2 = trunc i32 %shr4 to i16
51 ret i16 %conv2
172 %conv2 = zext i16 %inc to i32
173 %shl = shl nuw i32 %conv2, 16
[all …]
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| D | Redundantstore.ll | 14 %conv2 = trunc i64 %and to i32
18 store i32 %conv2, i32* %size4, align 4
22 store i32 %conv2, i32* %size6, align 4
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| D | aarch64-fix-cortex-a53-835769.ll | 158 %conv2 = sext i32 %0 to i64
159 %add3 = add nsw i64 %add, %conv2
178 %conv2 = sext i32 %0 to i64
179 %add = add nsw i64 %sub, %conv2
197 %conv2 = sext i32 %0 to i64
198 %div = sdiv i64 %mul, %conv2
216 %conv2 = sext i32 %0 to i64
217 %div = sdiv i64 %sub, %conv2
233 %conv2 = zext i32 %0 to i64
234 %add3 = add i64 %add, %conv2
[all …]
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| /external/llvm/test/Transforms/LoadCombine/ |
| D | load-combine-aa.ll | 16 %conv2 = zext i32 %load2 to i64
17 %shl = shl nuw i64 %conv2, 32
34 %conv2 = zext i32 %load2 to i64
35 %shl = shl nuw i64 %conv2, 32
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| D | load-combine-assume.ll | 20 %conv2 = zext i32 %load2 to i64
21 %shl = shl nuw i64 %conv2, 32
39 %conv2 = zext i32 %load2 to i64
40 %shl = shl nuw i64 %conv2, 32
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| /external/llvm/test/CodeGen/Thumb2/ |
| D | longMACt.ll | 30 %conv2 = zext i32 %c to i64
31 %add = add i64 %mul, %conv2
41 %conv2 = sext i32 %c to i64
42 %add = add nsw i64 %mul, %conv2
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| /external/llvm/test/CodeGen/Mips/ |
| D | madd-msub.ll | 50 %conv2 = sext i32 %b to i64
51 %mul = mul nsw i64 %conv2, %conv
89 %conv2 = zext i32 %b to i64
90 %mul = mul nsw i64 %conv2, %conv
131 %conv2 = sext i32 %b to i64
132 %mul = mul nsw i64 %conv2, %conv
175 %conv2 = sext i32 %a to i64
177 %mul = mul nsw i64 %conv4, %conv2
215 %conv2 = zext i32 %a to i64
217 %mul = mul nsw i64 %conv4, %conv2
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| /external/llvm/test/Instrumentation/AddressSanitizer/ |
| D | asan-vs-gvn.ll | 21 %conv2 = zext i8 %tmp1 to i32
22 %add = add nsw i32 %conv, %conv2
44 %conv2 = zext i8 %tmp1 to i32
45 %add = add nsw i32 %conv, %conv2
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| /external/llvm/test/CodeGen/X86/ |
| D | 2009-06-05-VariableIndexInsert.ll | 7 %conv2 = trunc i32 %b to i16 ; <i16> [#uses=1]
9 %vecins = insertelement <8 x i16> %conv, i16 %conv2, i32 %and ; <<8 x i16>> [#uses=1]
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