/external/valgrind/none/tests/mips64/ |
D | shift_instructions.stdout.exp-mips64 | 6657 dsra32 $t0, $t1, 0x00 :: rt 0x0, rs 0x0, imm 0x0000 6658 dsra32 $t2, $t3, 0x1f :: rt 0x0, rs 0x0, imm 0x001f 6659 dsra32 $a0, $a1, 0x0f :: rt 0x0, rs 0x0, imm 0x000f 6660 dsra32 $s0, $s1, 0x03 :: rt 0x0, rs 0x0, imm 0x0003 6661 dsra32 $t0, $t1, 0x00 :: rt 0x0, rs 0x12bd6aa, imm 0x0000 6662 dsra32 $t2, $t3, 0x1f :: rt 0x0, rs 0x12bd6aa, imm 0x001f 6663 dsra32 $a0, $a1, 0x0f :: rt 0x0, rs 0x12bd6aa, imm 0x000f 6664 dsra32 $s0, $s1, 0x03 :: rt 0x0, rs 0x12bd6aa, imm 0x0003 6665 dsra32 $t0, $t1, 0x00 :: rt 0x0, rs 0x0, imm 0x0000 6666 dsra32 $t2, $t3, 0x1f :: rt 0x0, rs 0x0, imm 0x001f [all …]
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D | shift_instructions.stdout.exp-mips64r2 | 11265 dsra32 $t0, $t1, 0x00 :: rt 0x0, rs 0x0, imm 0x0000 11266 dsra32 $t2, $t3, 0x1f :: rt 0x0, rs 0x0, imm 0x001f 11267 dsra32 $a0, $a1, 0x0f :: rt 0x0, rs 0x0, imm 0x000f 11268 dsra32 $s0, $s1, 0x03 :: rt 0x0, rs 0x0, imm 0x0003 11269 dsra32 $t0, $t1, 0x00 :: rt 0x0, rs 0x12bd6aa, imm 0x0000 11270 dsra32 $t2, $t3, 0x1f :: rt 0x0, rs 0x12bd6aa, imm 0x001f 11271 dsra32 $a0, $a1, 0x0f :: rt 0x0, rs 0x12bd6aa, imm 0x000f 11272 dsra32 $s0, $s1, 0x03 :: rt 0x0, rs 0x12bd6aa, imm 0x0003 11273 dsra32 $t0, $t1, 0x00 :: rt 0x0, rs 0x0, imm 0x0000 11274 dsra32 $t2, $t3, 0x1f :: rt 0x0, rs 0x0, imm 0x001f [all …]
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/external/llvm/test/MC/Mips/mips3/ |
D | valid.s | 92 …dsra32 $gp,10 # CHECK: dsra32 $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0x… 93 …dsra32 $gp,$s2,10 # CHECK: dsra32 $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0x…
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/external/llvm/test/MC/Mips/mips5/ |
D | valid.s | 96 …dsra32 $gp,10 # CHECK: dsra32 $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0x… 97 …dsra32 $gp,$s2,10 # CHECK: dsra32 $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0x…
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/external/llvm/test/MC/Mips/mips64/ |
D | valid.s | 103 …dsra32 $gp,10 # CHECK: dsra32 $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0x… 104 …dsra32 $gp,$s2,10 # CHECK: dsra32 $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0x…
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/external/llvm/test/MC/Mips/mips4/ |
D | valid.s | 96 …dsra32 $gp,10 # CHECK: dsra32 $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0x… 97 …dsra32 $gp,$s2,10 # CHECK: dsra32 $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0x…
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/external/llvm/test/MC/Mips/ |
D | mips64shift.ll | 37 ; CHECK: dsra32 ${{[0-9]+}}, ${{[0-9]+}}, 8
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/external/llvm/test/MC/Mips/mips64r2/ |
D | valid.s | 112 …dsra32 $gp,10 # CHECK: dsra32 $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0x… 113 …dsra32 $gp,$s2,10 # CHECK: dsra32 $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0x…
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/external/llvm/test/MC/Mips/mips64r5/ |
D | valid.s | 112 …dsra32 $gp,10 # CHECK: dsra32 $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0x… 113 …dsra32 $gp,$s2,10 # CHECK: dsra32 $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0x…
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/external/llvm/test/MC/Mips/mips64r3/ |
D | valid.s | 112 …dsra32 $gp,10 # CHECK: dsra32 $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0x… 113 …dsra32 $gp,$s2,10 # CHECK: dsra32 $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0x…
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/external/llvm/test/MC/Mips/mips2/ |
D | invalid-mips3.s | 37 …dsra32 $gp,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fea… 38 …dsra32 $gp,$s2,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fea…
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D | invalid-mips5.s | 34 …dsra32 $gp,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur… 35 …dsra32 $gp,$s2,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
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D | invalid-mips4.s | 35 …dsra32 $gp,$s2,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur… 36 …dsra32 $gp,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
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/external/llvm/test/MC/Mips/mips1/ |
D | invalid-mips3.s | 41 …dsra32 $gp,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 42 …dsra32 $gp,$s2,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
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D | invalid-mips4.s | 37 …dsra32 $gp,$s2,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 38 …dsra32 $gp,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
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D | invalid-mips5.s | 36 …dsra32 $gp,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 37 …dsra32 $gp,$s2,10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
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/external/llvm/test/MC/Disassembler/Mips/mips3/ |
D | valid-mips3-el.txt | 82 0xbf 0xe2 0x1c 0x00 # CHECK: dsra32 $gp, $gp, 10 83 0xbf 0xe2 0x12 0x00 # CHECK: dsra32 $gp, $18, 10
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D | valid-mips3.txt | 35 0x00 0x12 0xe2 0xbf # CHECK: dsra32 $gp, $18, 10 41 0x00 0x1c 0xe2 0xbf # CHECK: dsra32 $gp, $gp, 10
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/external/llvm/test/MC/Disassembler/Mips/mips4/ |
D | valid-mips4-el.txt | 86 0xbf 0xe2 0x1c 0x00 # CHECK: dsra32 $gp, $gp, 10 87 0xbf 0xe2 0x12 0x00 # CHECK: dsra32 $gp, $18, 10
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D | valid-mips4.txt | 35 0x00 0x12 0xe2 0xbf # CHECK: dsra32 $gp, $18, 10 41 0x00 0x1c 0xe2 0xbf # CHECK: dsra32 $gp, $gp, 10
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/external/llvm/test/MC/Disassembler/Mips/mips64r5/ |
D | valid-mips64r5-el.txt | 103 0xbf 0xe2 0x1c 0x00 # CHECK: dsra32 $gp, $gp, 10 104 0xbf 0xe2 0x12 0x00 # CHECK: dsra32 $gp, $18, 10
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/external/llvm/test/MC/Disassembler/Mips/mips64r3/ |
D | valid-mips64r3-el.txt | 103 0xbf 0xe2 0x1c 0x00 # CHECK: dsra32 $gp, $gp, 10 104 0xbf 0xe2 0x12 0x00 # CHECK: dsra32 $gp, $18, 10
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/external/llvm/test/MC/Disassembler/Mips/mips64/ |
D | valid-mips64-el.txt | 100 0xbf 0xe2 0x1c 0x00 # CHECK: dsra32 $gp, $gp, 10 101 0xbf 0xe2 0x12 0x00 # CHECK: dsra32 $gp, $18, 10
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D | valid-mips64.txt | 42 0x00 0x12 0xe2 0xbf # CHECK: dsra32 $gp, $18, 10 50 0x00 0x1c 0xe2 0xbf # CHECK: dsra32 $gp, $gp, 10
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/external/llvm/test/MC/Disassembler/Mips/mips64r2/ |
D | valid-mips64r2-el.txt | 106 0xbf 0xe2 0x1c 0x00 # CHECK: dsra32 $gp, $gp, 10 107 0xbf 0xe2 0x12 0x00 # CHECK: dsra32 $gp, $18, 10
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