Home
last modified time | relevance | path

Searched refs:extrq (Results 1 – 8 of 8) sorted by relevance

/external/llvm/test/MC/X86/
Dx86_64-sse4a.s3 extrq $2, $3, %xmm0 label
4 # CHECK: extrq $2, $3, %xmm0
7 extrq %xmm1, %xmm0 label
8 # CHECK: extrq %xmm1, %xmm0
/external/llvm/test/CodeGen/X86/
Dsse4a-intrinsics-fast-isel.ll10 ; X32-NEXT: extrq $2, $3, %xmm0
15 ; X64-NEXT: extrq $2, $3, %xmm0
25 ; X32-NEXT: extrq %xmm1, %xmm0
30 ; X64-NEXT: extrq %xmm1, %xmm0
33 %res = call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %bc)
36 declare <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64>, <16 x i8>) nounwind readnone
Dsse4a.ll24 ; CHECK: extrq
33 ; CHECK: extrq
35 %2 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %1) nounwind
39 declare <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64>, <16 x i8>) nounwind
Dvector-shuffle-sse4a.ll13 ; ALL-NEXT: extrq {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5,6,7,u,u,u,u,u,u,u,u]
22 ; ALL-NEXT: extrq {{.*#+}} xmm0 = xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,…
32 ; ALL-NEXT: extrq {{.*#+}} xmm0 = xmm0[u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
41 ; BTVER1-NEXT: extrq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u…
56 ; BTVER1-NEXT: extrq {{.*#+}} xmm1 = xmm1[1],zero,zero,zero,zero,zero,zero,zero,xmm1[u,u,u,u,u,u…
57 ; BTVER1-NEXT: extrq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u…
73 ; BTVER1-NEXT: extrq {{.*#+}} xmm1 = xmm1[3],zero,zero,zero,zero,zero,zero,zero,xmm1[u,u,u,u,u,u…
74 ; BTVER1-NEXT: extrq {{.*#+}} xmm0 = xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u…
90 ; BTVER1-NEXT: extrq {{.*#+}} xmm0 = xmm0[0,1],zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,…
105 ; BTVER1-NEXT: extrq {{.*#+}} xmm1 = xmm1[2,3],zero,zero,zero,zero,zero,zero,xmm1[u,u,u,u,u,u,u,…
[all …]
/external/llvm/test/Transforms/InstCombine/
Dx86-sse4a.ll9 ; CHECK-NEXT: %1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %y)
11 %1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %y) nounwind
18 %1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> zeroinitializer, <16 x i8> %y) nounwind
25 %1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> zeroinitializer) nounwind
33 …%1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> <i8 8, i8 15, i8 0, i8 0, i…
40 …%1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> <i64 -1, i64 55>, <16 x i8> <i8 8, i8 15,…
47 …%1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> <i64 -1, i64 undef>, <16 x i8> <i8 16, i8…
222 ; CHECK-NEXT: %1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %y)
225 %2 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %1, <16 x i8> %y) nounwind
231 ; CHECK-NEXT: %1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %y)
[all …]
/external/llvm/test/MC/Disassembler/X86/
Dx86-64.txt65 # CHECK: extrq $2, $3, %xmm0
68 # CHECK: extrq %xmm1, %xmm0
Dx86-32.txt640 # CHECK: extrq $2, $3, %xmm0
643 # CHECK: extrq %xmm1, %xmm0
/external/llvm/lib/Target/X86/
DX86InstrSSE.td7765 "extrq\t{$idx, $len, $src|$src, $len, $idx}",
7770 "extrq\t{$mask, $src|$src, $mask}",