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/external/mesa3d/src/mesa/sparc/
Dnorm.S29 ld [%sp + STACK_VAR_OFF+0x4], %f15 ! f15 = scale
104 fmuls M0, %f15, M0
105 fmuls M1, %f15, M1
106 fmuls M2, %f15, M2
107 fmuls M4, %f15, M4
108 fmuls M5, %f15, M5
109 fmuls M6, %f15, M6
110 fmuls M8, %f15, M8
111 fmuls M9, %f15, M9
112 fmuls M10, %f15, M10
[all …]
/external/llvm/test/MC/SystemZ/
Dinsn-good.s26 #CHECK: adb %f15, 0 # encoding: [0xed,0xf0,0x00,0x00,0x00,0x1a]
34 adb %f15, 0
37 #CHECK: adbr %f0, %f15 # encoding: [0xb3,0x1a,0x00,0x0f]
39 #CHECK: adbr %f15, %f0 # encoding: [0xb3,0x1a,0x00,0xf0]
42 adbr %f0, %f15
44 adbr %f15, %f0
52 #CHECK: aeb %f15, 0 # encoding: [0xed,0xf0,0x00,0x00,0x00,0x0a]
60 aeb %f15, 0
63 #CHECK: aebr %f0, %f15 # encoding: [0xb3,0x0a,0x00,0x0f]
65 #CHECK: aebr %f15, %f0 # encoding: [0xb3,0x0a,0x00,0xf0]
[all …]
Dregs-good.s64 #CHECK: ler %f14, %f15 # encoding: [0x38,0xef]
73 ler %f14,%f15
82 #CHECK: ldr %f14, %f15 # encoding: [0x28,0xef]
91 ldr %f14,%f15
134 #CHECK: .cfi_offset %f15, 248
168 .cfi_offset %f15,248
Dinsn-good-z196.s143 #CHECK: cdlfbr %f15, 0, %r0, 0 # encoding: [0xb3,0x91,0x00,0xf0]
150 cdlfbr %f15, 0, %r0, 0
157 #CHECK: cdlgbr %f15, 0, %r0, 0 # encoding: [0xb3,0xa1,0x00,0xf0]
164 cdlgbr %f15, 0, %r0, 0
171 #CHECK: celfbr %f15, 0, %r0, 0 # encoding: [0xb3,0x90,0x00,0xf0]
178 celfbr %f15, 0, %r0, 0
185 #CHECK: celgbr %f15, 0, %r0, 0 # encoding: [0xb3,0xa0,0x00,0xf0]
192 celgbr %f15, 0, %r0, 0
232 #CHECK: clfdbr %r0, 0, %f15, 0 # encoding: [0xb3,0x9d,0x00,0x0f]
239 clfdbr %r0, 0, %f15, 0
[all …]
/external/llvm/test/CodeGen/Mips/
Dselect.ll221 ; 64: c.eq.s $f14, $f15
225 ; 64R2: c.eq.s $f14, $f15
229 ; 64R6: cmp.eq.s $[[CC:f0]], $f14, $f15
258 ; 64: c.olt.s $f14, $f15
262 ; 64R2: c.olt.s $f14, $f15
266 ; 64R6: cmp.lt.s $[[CC:f0]], $f14, $f15
295 ; 64: c.ule.s $f14, $f15
299 ; 64R2: c.ule.s $f14, $f15
303 ; 64R6: cmp.lt.s $[[CC:f0]], $f15, $f14
332 ; 64: c.ule.s $f14, $f15
[all …]
/external/llvm/test/CodeGen/SystemZ/
Dframe-07.ll22 ; CHECK-NOFP: std %f15, 4064(%r15)
30 ; CHECK-NOFP: .cfi_offset %f15, -224
39 ; CHECK-NOFP: ld %f15, 4064(%r15)
56 ; CHECK-FP: std %f15, 4064(%r11)
65 ; CHECK-FP: ld %f15, 4064(%r11)
143 ; CHECK-NOFP: stdy %f15, 524256(%r15)
151 ; CHECK-NOFP: .cfi_offset %f15, -224
160 ; CHECK-NOFP: ldy %f15, 524256(%r15)
176 ; CHECK-FP: stdy %f15, 524256(%r11)
184 ; CHECK-FP: .cfi_offset %f15, -224
[all …]
Dframe-04.ll21 ; CHECK: std %f15, 160(%r15)
29 ; CHECK: .cfi_offset %f15, -224
38 ; CHECK: ld %f15, 160(%r15)
69 ; so %f13+%f15 is the pair that gets dropped.
87 ; CHECK-NOT: %f15
136 ; CHECK-NOT: %f15
172 ; CHECK-NOT: %f15
Dframe-17.ll18 ; CHECK: std %f15, 168(%r15)
31 ; CHECK: ld %f15, 168(%r15)
82 ; CHECK: std %f15, 168(%r15)
92 ; CHECK: ld %f15, 168(%r15)
143 ; CHECK: std %f15, 176(%r15)
155 ; CHECK: ld %f15, 176(%r15)
Dframe-03.ll22 ; CHECK: std %f15, 160(%r15)
30 ; CHECK: .cfi_offset %f15, -224
39 ; CHECK: ld %f15, 160(%r15)
94 ; so %f15 is the one that gets dropped.
113 ; CHECK-NOT: %f15
185 ; CHECK-NOT: %f15
232 ; CHECK-NOT: %f15
Dframe-02.ll20 ; CHECK: std %f15, 160(%r15)
28 ; CHECK: .cfi_offset %f15, -224
37 ; CHECK: ld %f15, 160(%r15)
92 ; so %f15 is the one that gets dropped.
111 ; CHECK-NOT: %f15
183 ; CHECK-NOT: %f15
230 ; CHECK-NOT: %f15
/external/llvm/test/MC/Disassembler/SystemZ/
Dinsns.txt7 # CHECK: adbr %f0, %f15
13 # CHECK: adbr %f15, %f0
34 # CHECK: adb %f15, 0
40 # CHECK: aebr %f0, %f15
46 # CHECK: aebr %f15, %f0
67 # CHECK: aeb %f15, 0
850 # CHECK: cdbr %f0, %f15
856 # CHECK: cdbr %f15, %f0
877 # CHECK: cdb %f15, 0
886 # CHECK: cdfbr %f15, %r0
[all …]
/external/valgrind/VEX/priv/
Dhost_s390_isel.c1249 HReg op_hi, op_lo, f13, f15; in s390_isel_int_expr_wrk() local
1256 f15 = make_fpr(15); in s390_isel_int_expr_wrk()
1260 addInstr(env, s390_insn_move(8, f15, op_lo)); in s390_isel_int_expr_wrk()
1264 INVALID_HREG, f13, f15, in s390_isel_int_expr_wrk()
1283 HReg op_hi, op_lo, f13, f15; in s390_isel_int_expr_wrk() local
1290 f15 = make_fpr(15); in s390_isel_int_expr_wrk()
1294 addInstr(env, s390_insn_move(8, f15, op_lo)); in s390_isel_int_expr_wrk()
1299 f15, rounding_mode)); in s390_isel_int_expr_wrk()
1351 HReg op1_hi, op1_lo, op2_hi, op2_lo, f12, f13, f14, f15, cc_s390; in s390_isel_int_expr_wrk() local
1361 f15 = make_fpr(15); in s390_isel_int_expr_wrk()
[all …]
/external/v8/test/webkit/
DtoString-elision-trailing-comma-expected.txt100 PASS f15().length is 2
101 PASS f15()[2-1] is undefined
102 PASS unevalf(eval(unevalf(f15))) is unevalf(f15)
103 PASS eval(unevalf(f15))().length is 2
104 PASS eval(unevalf(f15))()[2-1] is undefined
/external/clang/test/CXX/except/except.spec/
Dp5-virtual.cpp45 virtual void f15();
81 virtual void f15() noexcept;
/external/llvm/test/CodeGen/PowerPC/
Dppc64-fastcc.ll5 …, <4 x i32> %v13, i64 %g14, double %f14, <4 x i32> %v14, i64 %g15, double %f15, <4 x i32> %v15, i6…
13 …, <4 x i32> %v13, i64 %g14, double %f14, <4 x i32> %v14, i64 %g15, double %f15, <4 x i32> %v15, i6…
21 …, <4 x i32> %v13, i64 %g14, double %f14, <4 x i32> %v14, i64 %g15, double %f15, <4 x i32> %v15, i6…
29 …, <4 x i32> %v13, i64 %g14, double %f14, <4 x i32> %v14, i64 %g15, double %f15, <4 x i32> %v15, i6…
37 …, <4 x i32> %v13, i64 %g14, double %f14, <4 x i32> %v14, i64 %g15, double %f15, <4 x i32> %v15, i6…
45 …, <4 x i32> %v13, i64 %g14, double %f14, <4 x i32> %v14, i64 %g15, double %f15, <4 x i32> %v15, i6…
53 …, <4 x i32> %v13, i64 %g14, double %f14, <4 x i32> %v14, i64 %g15, double %f15, <4 x i32> %v15, i6…
61 …, <4 x i32> %v13, i64 %g14, double %f14, <4 x i32> %v14, i64 %g15, double %f15, <4 x i32> %v15, i6…
69 …, <4 x i32> %v13, i64 %g14, double %f14, <4 x i32> %v14, i64 %g15, double %f15, <4 x i32> %v15, i6…
77 …, <4 x i32> %v13, i64 %g14, double %f14, <4 x i32> %v14, i64 %g15, double %f15, <4 x i32> %v15, i6…
[all …]
Dvsx-spill.ll10 …},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f1…
31 …},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f1…
51 …},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f1…
/external/webrtc/webrtc/modules/audio_processing/aec/
Daec_rdft_mips.c929 float f1, f2, f3 ,f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14, f15; in rftfsub_128_mips() local
1042 [f13] "=&f" (f13), [f14] "=&f" (f14), [f15] "=&f" (f15), in rftfsub_128_mips()
1056 float f1, f2, f3 ,f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14, f15; in rftbsub_128_mips() local
1172 [f13] "=&f" (f13), [f14] "=&f" (f14), [f15] "=&f" (f15), in rftbsub_128_mips()
/external/llvm/test/MC/Mips/mips3/
Dvalid.s53 cvt.l.d $f24,$f15
56 cvt.s.l $f15,$f30
57 cvt.s.w $f22,$f15
74 div.s $f4,$f5,$f15
162 neg.s $f1,$f15
236 trunc.w.d $f22,$f15
/external/llvm/test/DebugInfo/SystemZ/
Deh_frame.s23 std %f15, 216(%r15)
31 .cfi_offset %f15, -168
/external/llvm/test/MC/Mips/mips2/
Dvalid.s50 cvt.s.w $f22,$f15
55 div.s $f4,$f5,$f15
102 neg.s $f1,$f15
170 trunc.w.d $f22,$f15
/external/llvm/test/MC/Mips/mips5/
Dvalid.s57 cvt.l.d $f24,$f15
60 cvt.s.l $f15,$f30
61 cvt.s.w $f22,$f15
78 div.s $f4,$f5,$f15
185 neg.s $f1,$f15
267 trunc.w.d $f22,$f15
/external/llvm/test/MC/Mips/mips64/
Dvalid.s59 cvt.l.d $f24,$f15
62 cvt.s.l $f15,$f30
63 cvt.s.w $f22,$f15
83 div.s $f4,$f5,$f15
201 neg.s $f1,$f15
286 trunc.w.d $f22,$f15
/external/llvm/test/MC/Mips/mips4/
Dvalid.s57 cvt.l.d $f24,$f15
60 cvt.s.l $f15,$f30
61 cvt.s.w $f22,$f15
78 div.s $f4,$f5,$f15
184 neg.s $f1,$f15
265 trunc.w.d $f22,$f15
/external/llvm/test/MC/Mips/mips1/
Dvalid.s36 cvt.s.w $f22,$f15
41 div.s $f4,$f5,$f15
82 neg.s $f1,$f15
/external/clang/test/CodeGen/
Dregparm-struct.c143 __attribute__((regparm(3))) void f15(struct s11 a, int b);
147 f15(x, 43); in g15()

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