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Searched refs:fcvtzs (Results 1 – 25 of 42) sorted by relevance

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/external/llvm/test/CodeGen/AArch64/
Dcomplex-fp-to-int.ll6 ; CHECK: fcvtzs.2d v0, [[VAL64]]
23 ; CHECK: fcvtzs.2s v0, v0
31 ; CHECK: fcvtzs.2s v0, v0
39 ; CHECK: fcvtzs.2s v0, v0
47 ; CHECK: fcvtzs.2s v0, v0
55 ; CHECK: fcvtzs.4s [[VAL64:v[0-9]+]], v0
73 ; CHECK: fcvtzs.4s [[VAL64:v[0-9]+]], v0
82 ; CHECK: fcvtzs.4s [[VAL64:v[0-9]+]], v0
91 ; CHECK: fcvtzs.2d [[VAL64:v[0-9]+]], v0
109 ; CHECK: fcvtzs.2d [[VAL64:v[0-9]+]], v0
[all …]
Darm64-convert-v4f64.ll6 ; CHECK-DAG: fcvtzs v[[LHS:[0-9]+]].2d, v0.2d
7 ; CHECK-DAG: fcvtzs v[[RHS:[0-9]+]].2d, v1.2d
18 ; CHECK-DAG: fcvtzs v[[CONV0:[0-9]+]].2d, v0.2d
19 ; CHECK-DAG: fcvtzs v[[CONV1:[0-9]+]].2d, v1.2d
20 ; CHECK-DAG: fcvtzs v[[CONV2:[0-9]+]].2d, v2.2d
21 ; CHECK-DAG: fcvtzs v[[CONV3:[0-9]+]].2d, v3.2d
Dfcvt_combine.ll5 ; CHECK: fcvtzs.2s v0, v0, #4
15 ; CHECK: fcvtzs.4s v0, v0, #3
25 ; CHECK: fcvtzs.2d v0, v0, #5
36 ; CHECK: fcvtzs.2d v0, v0
48 ; CHECK: fcvtzs.2s v0, v0, #4
61 ; CHECK: fcvtzs.2d v0, v0
127 ; CHECK: fcvtzs.2s v0, v0
138 ; CHECK: fcvtzs.2s v0, v0
148 ; CHECK: fcvtzs.2s v0, v0, #32
Dfcvt-fixed.ll15 ; CHECK: fcvtzs {{w[0-9]+}}, {{s[0-9]+}}, #7
20 ; CHECK: fcvtzs {{w[0-9]+}}, {{s[0-9]+}}, #32
25 ; CHECK: fcvtzs {{x[0-9]+}}, {{s[0-9]+}}, #7
30 ; CHECK: fcvtzs {{x[0-9]+}}, {{s[0-9]+}}, #64
35 ; CHECK: fcvtzs {{w[0-9]+}}, {{d[0-9]+}}, #7
40 ; CHECK: fcvtzs {{w[0-9]+}}, {{d[0-9]+}}, #32
45 ; CHECK: fcvtzs {{x[0-9]+}}, {{d[0-9]+}}, #7
50 ; CHECK: fcvtzs {{x[0-9]+}}, {{d[0-9]+}}, #64
Darm64-cvt.ll328 ;CHECK: fcvtzs w0, s0
330 %tmp3 = call i32 @llvm.aarch64.neon.fcvtzs.i32.f32(float %A)
336 ;CHECK: fcvtzs x0, s0
338 %tmp3 = call i64 @llvm.aarch64.neon.fcvtzs.i64.f32(float %A)
344 ;CHECK: fcvtzs w0, d0
346 %tmp3 = call i32 @llvm.aarch64.neon.fcvtzs.i32.f64(double %A)
352 ;CHECK: fcvtzs x0, d0
354 %tmp3 = call i64 @llvm.aarch64.neon.fcvtzs.i64.f64(double %A)
358 declare i32 @llvm.aarch64.neon.fcvtzs.i32.f32(float) nounwind readnone
359 declare i64 @llvm.aarch64.neon.fcvtzs.i64.f32(float) nounwind readnone
[all …]
Dfcvt-int.ll9 ; CHECK-DAG: fcvtzs [[SIG:w[0-9]+]], {{s[0-9]+}}
24 ; CHECK-DAG: fcvtzs [[SIG:w[0-9]+]], {{d[0-9]+}}
39 ; CHECK-DAG: fcvtzs [[SIG:x[0-9]+]], {{s[0-9]+}}
54 ; CHECK-DAG: fcvtzs [[SIG:x[0-9]+]], {{d[0-9]+}}
Darm64-vcvt_su32_f32.ll5 ; CHECK: fcvtzs.2s v0, v0
21 ; CHECK: fcvtzs.4s v0, v0
Dround-conv.ll164 ; CHECK: fcvtzs w0, s0
174 ; CHECK: fcvtzs x0, s0
184 ; CHECK: fcvtzs w0, d0
194 ; CHECK: fcvtzs x0, d0
Darm64-fast-isel-noconvert.ll32 ; CHECK: fcvtzs.2d v0, v0
Darm64-vcvt.ll254 ;CHECK: fcvtzs.2s v0, v0
263 ;CHECK: fcvtzs.4s v0, v0
272 ;CHECK: fcvtzs.2d v0, v0
547 ;CHECK: fcvtzs.2s v0, v0, #1
556 ;CHECK: fcvtzs.4s v0, v0, #1
565 ;CHECK: fcvtzs.2d v0, v0, #1
Dfp16-v4-instructions.ll232 ; CHECK-NEXT: fcvtzs [[REG2:v[0-9]+\.4s]], [[REG1]]
242 ; CHECK-NEXT: fcvtzs [[REG2:v[0-9]+\.4s]], [[REG1]]
252 ; NOTE: fcvtzs selected here because the xtn shaves the sign bit
253 ; CHECK-NEXT: fcvtzs [[REG2:v[0-9]+\.4s]], [[REG1]]
Dfp16-v8-instructions.ll374 ; CHECK-DAG: fcvtzs [[LOF32:v[0-9]+\.4s]], [[LO]]
376 ; CHECK-DAG: fcvtzs [[HIF32:v[0-9]+\.4s]], [[HI]]
388 ; CHECK-DAG: fcvtzs [[LOF32:v[0-9]+\.4s]], [[LO]]
390 ; CHECK-DAG: fcvtzs [[HIF32:v[0-9]+\.4s]], [[HI]]
Darm64-fast-isel-conversion.ll205 ; CHECK: fcvtzs w0, s0
214 ; CHECK: fcvtzs w0, d0
/external/llvm/test/MC/AArch64/
Dneon-scalar-cvt.s57 fcvtzs h21, h12, #1
58 fcvtzs s21, s12, #1
59 fcvtzs d21, d12, #1
194 fcvtzs h12, h13
195 fcvtzs s12, s13
196 fcvtzs d21, d14
Darm64-fp-encoding.s398 fcvtzs w1, h2
399 fcvtzs w1, h2, #1
400 fcvtzs w1, s2
401 fcvtzs w1, s2, #1
402 fcvtzs w1, d2
403 fcvtzs w1, d2, #1
404 fcvtzs x1, h2
405 fcvtzs x1, h2, #1
406 fcvtzs x1, s2
407 fcvtzs x1, s2, #1
[all …]
Dneon-simd-shift.s428 fcvtzs v0.4h, v1.4h, #3
429 fcvtzs v0.8h, v1.8h, #3
430 fcvtzs v0.2s, v1.2s, #3
431 fcvtzs v0.4s, v1.4s, #3
432 fcvtzs v0.2d, v1.2d, #3
Dneon-simd-misc.s621 fcvtzs v4.4h, v0.4h
622 fcvtzs v6.8h, v8.8h
623 fcvtzs v6.4s, v8.4s
624 fcvtzs v6.2d, v8.2d
625 fcvtzs v4.2s, v0.2s
Dfullfp16-neon-neg.s226 fcvtzs h21, h12, #1
246 fcvtzs h12, h13
354 fcvtzs v4.4h, v0.4h
356 fcvtzs v6.8h, v8.8h
Dbasic-a64-instructions.s1953 fcvtzs w3, s5, #1
1954 fcvtzs wzr, s20, #13
1955 fcvtzs w19, s0, #32
1960 fcvtzs x3, s5, #1
1961 fcvtzs x12, s30, #45
1962 fcvtzs x19, s0, #64
1967 fcvtzs w3, d5, #1
1968 fcvtzs wzr, d20, #13
1969 fcvtzs w19, d0, #32
1974 fcvtzs x3, d5, #1
[all …]
Darm64-advsimd.s900 fcvtzs.2s v0, v0
901 fcvtzs.4s v0, v0
902 fcvtzs.2d v0, v0
903 fcvtzs s0, s0
904 fcvtzs d0, d0 define
906 ; CHECK: fcvtzs.2s v0, v0 ; encoding: [0x00,0xb8,0xa1,0x0e]
907 ; CHECK: fcvtzs.4s v0, v0 ; encoding: [0x00,0xb8,0xa1,0x4e]
908 ; CHECK: fcvtzs.2d v0, v0 ; encoding: [0x00,0xb8,0xe1,0x4e]
909 ; CHECK: fcvtzs s0, s0 ; encoding: [0x00,0xb8,0xa1,0x5e]
910 ; CHECK: fcvtzs d0, d0 ; encoding: [0x00,0xb8,0xe1,0x5e]
[all …]
Dbasic-a64-diagnostics.s1669 fcvtzs w13, s31, #0
1670 fcvtzs w19, s20, #33
1671 fcvtzs wsp, s19, #14
1682 fcvtzs x13, s31, #0
1683 fcvtzs x19, s20, #65
1684 fcvtzs sp, s19, #14
Dneon-diagnostics.s2068 fcvtzs v0.2s, v1.2d, #3
2069 fcvtzs v0.4s, v1.4h, #3
2070 fcvtzs v0.2d, v1.2s, #3
5921 fcvtzs v0.16b, v31.16b
5922 fcvtzs v2.8h, v4.8h
5923 fcvtzs v1.8b, v9.8b
5924 fcvtzs v13.4h, v21.4h
6277 fcvtzs s21, s12, #0
6278 fcvtzs d21, d12, #65
6279 fcvtzs s21, d12, #1
[all …]
/external/llvm/test/MC/Disassembler/AArch64/
Dbasic-a64-instructions.txt1520 # FP16: fcvtzs w3, h5, #1
1521 # FP16: fcvtzs wzr, h20, #13
1522 # FP16: fcvtzs w19, h0, #32
1527 # FP16: fcvtzs x3, h5, #1
1528 # FP16: fcvtzs x12, h30, #45
1529 # FP16: fcvtzs x19, h0, #64
1534 # CHECK: fcvtzs w3, s5, #1
1535 # CHECK: fcvtzs wzr, s20, #13
1536 # CHECK: fcvtzs w19, s0, #32
1541 # CHECK: fcvtzs x3, s5, #1
[all …]
/external/valgrind/none/tests/arm64/
Dfp_and_simd.stdout.exp26765 fcvtzs d10, d21 f662dc6cdf9eaa8c5ea3e787eda72e5d c6795aefc88f609df877b904fd3eeb29 0000000000000…
26767 fcvtzs s10, s21 f0fae0ec31e64031b06ed98edc0c1ca8 278ab3b766a867f92bdc6924147714de 0000000000000…
26769 fcvtzs v10.2d, v21.2d 77e655b438492fa5609c8d6d519db353 76cedca519bc28061d843bfb0fbb46d3 7ffffff…
26771 fcvtzs v10.4s, v21.4s 8b253cc3f4c778e96d2e02234b59f45e b246d7bbe2cca2c1cb702f8bf00b8207 0000000…
26773 fcvtzs v10.2s, v21.2s dbf1a4f9c1d8d52d37a044d1b766c77b ed93279590263bec53b1f7707a4cbddb 0000000…
26775 fcvtzs w21, s10 f2d0425eb5dfc24761137bcf63cd162e 3867055dddbac51aaabb5823d9c2f3d4 f2d0425eb5dfc…
26777 fcvtzs x21, s10 f7e2b2ebbee1691248c9d385f53f6f21 d04d152c9f2a69d91fe83a6e7d2393ed f7e2b2ebbee16…
26779 fcvtzs w21, d10 b6475603d7762626b1389e5067719c25 2593ce5caa70b80f3e168af470804cf4 b6475603d7762…
26781 fcvtzs x21, d10 e955c9e2849dfd0461ac83ca97a90e7d f7310dd95c00f87c073ca5df7e24f28d e955c9e2849df…
26783 fcvtzs d10, d21, #1 6a766dc8a79fed702e44eadb0bceeaf4 78c3de3ee44cb1594e66a24131946126 000000000…
[all …]
/external/v8/test/cctest/
Dtest-disasm-arm64.cc1527 COMPARE(fcvtzs(x20, d21), "fcvtzs x20, d21"); in TEST_()
1528 COMPARE(fcvtzs(w22, d23), "fcvtzs w22, d23"); in TEST_()
1531 COMPARE(fcvtzs(x20, s21), "fcvtzs x20, s21"); in TEST_()
1532 COMPARE(fcvtzs(w22, s23), "fcvtzs w22, s23"); in TEST_()

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