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Searched refs:getSignExtendVectorInReg (Results 1 – 4 of 4) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DSelectionDAG.h617 SDValue getSignExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT);
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorTypes.cpp3061 return DAG.getSignExtendVectorInReg(InOp, DL, VT); in WidenVecOp_EXTEND()
DSelectionDAG.cpp1060 SDValue SelectionDAG::getSignExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) { in getSignExtendVectorInReg() function in SelectionDAG
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp15413 SDValue Shuff = DAG.getSignExtendVectorInReg(SlicedVec, dl, RegVT); in LowerExtendedLoad()
27071 return DAG.getSignExtendVectorInReg(ExOp, DL, VT); in PerformSExtCombine()
27090 SrcVec = DAG.getSignExtendVectorInReg(SrcVec, DL, SubVT); in PerformSExtCombine()