Searched refs:getZeroExtendInReg (Results 1 – 8 of 8) sorted by relevance
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeIntegerTypes.cpp | 459 return DAG.getZeroExtendInReg(Res, dl, in PromoteIntRes_INT_EXTEND()
744 SDValue Ofl = DAG.getZeroExtendInReg(Res, dl, OVT); in PromoteIntRes_UADDSUBO()
1265 return DAG.getZeroExtendInReg(Op, dl, in PromoteIntOp_ZERO_EXTEND()
2611 Hi = DAG.getZeroExtendInReg(Hi, dl, in ExpandIntRes_ZERO_EXTEND()
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| D | LegalizeTypes.h | 237 return DAG.getZeroExtendInReg(Op, dl, OldVT.getScalarType()); in ZExtPromotedInteger()
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| D | LegalizeDAG.cpp | 795 Value = DAG.getZeroExtendInReg(Value, dl, StVT); in LegalizeStoreOps()
1180 ValRes = DAG.getZeroExtendInReg(Result, dl, SrcVT.getScalarType()); in LegalizeLoadOps()
2601 SDValue Lo = DAG.getZeroExtendInReg(Op0, dl, MVT::i32); in ExpandLegalINT_TO_FP()
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| D | DAGCombiner.cpp | 1028 return DAG.getZeroExtendInReg(NewOp, dl, OldVT); in ZExtPromoteOperand()
6293 Op = DAG.getZeroExtendInReg(Op, SDLoc(N), MinVT.getScalarType()); in visitZERO_EXTEND()
6308 return DAG.getZeroExtendInReg(Op, SDLoc(N), MinVT.getScalarType()); in visitZERO_EXTEND()
6927 return DAG.getZeroExtendInReg(N0, SDLoc(N), EVT); in visitSIGN_EXTEND_INREG()
14162 Temp = DAG.getZeroExtendInReg(SCC, SDLoc(N2), in SimplifySelectCC()
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| D | TargetLowering.cpp | 882 TLO.DAG.getZeroExtendInReg(Op.getOperand(0),dl,ExVT)); in SimplifyDemandedBits()
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| D | SelectionDAG.cpp | 1038 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, SDLoc DL, EVT VT) { in getZeroExtendInReg() function in SelectionDAG
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 1476 DAG.getZeroExtendInReg(Ret, DL, MemEltVT), in LowerLOAD()
1523 SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT); in LowerSTORE()
2532 return DAG.getZeroExtendInReg(BitsFrom, DL, SmallVT); in PerformDAGCombine()
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| /external/llvm/include/llvm/CodeGen/ |
| D | SelectionDAG.h | 605 SDValue getZeroExtendInReg(SDValue Op, SDLoc DL, EVT SrcTy);
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