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/external/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.cpp198 static int consumeByte(struct InternalInstruction* insn, uint8_t* byte) { in consumeByte() argument
199 int ret = insn->reader(insn->readerArg, byte, insn->readerCursor); in consumeByte()
202 ++(insn->readerCursor); in consumeByte()
214 static int lookAtByte(struct InternalInstruction* insn, uint8_t* byte) { in lookAtByte() argument
215 return insn->reader(insn->readerArg, byte, insn->readerCursor); in lookAtByte()
218 static void unconsumeByte(struct InternalInstruction* insn) { in unconsumeByte() argument
219 insn->readerCursor--; in unconsumeByte()
223 static int name(struct InternalInstruction* insn, type* ptr) { \
228 int ret = insn->reader(insn->readerArg, \
230 insn->readerCursor + offset); \
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/external/valgrind/none/tests/s390x/
Dfpext.c7 #define L2F(insn, initial, target,round) \ argument
11 asm volatile(insn(round,0,0,2) :"=f" (_t):"d"(source)); \
15 #define F2L(insn, initial, type, round, cc) \ argument
19 asm volatile(insn(round,0,2,0) \
27 #define DO_INSN_L2F32(insn, round) \ argument
30 printf(#insn " %f\n", L2F(insn, 0, f32, round)); \
31 printf(#insn " %f\n", L2F(insn, 1, f32, round)); \
32 printf(#insn " %f\n", L2F(insn, 0xffffffffUL, f32, round)); \
33 printf(#insn " %f\n", L2F(insn, 0x80000000UL, f32, round)); \
34 printf(#insn " %f\n", L2F(insn, 0x7fffffffUL, f32, round)); \
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Dcomp-1.c21 #define SCOMP_REG_REG(insn, v1, v2) \ argument
26 asm volatile( #insn " %1, %2\n\t" \
33 #insn, op1, op2, cc); \
38 #define SCOMP_REG_MEM(insn, v1, v2, op2_t) \ argument
43 asm volatile( #insn " %1, %2\n\t" \
50 #insn, op1, (int64_t)op2, cc); \
55 #define SCOMP_REG_IMM(insn, v1, v2) \ argument
59 asm volatile( insn(8, v2) \
66 #insn, op1, (int64_t)v2, cc); \
70 #define run_scomp_reg_reg(insn) \ argument
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Dcomp-2.c21 #define SCOMP_REG_REG(insn, v1, v2) \ argument
26 asm volatile( #insn " %1, %2\n\t" \
33 #insn, op1, op2, cc); \
38 #define SCOMP_REG_MEM(insn, v1, v2, op2_t) \ argument
43 asm volatile( #insn " %1, %2\n\t" \
50 #insn, op1, (uint64_t)op2, cc); \
55 #define SCOMP_REG_IMM(insn, v1, v2) \ argument
59 asm volatile( insn(8, v2) \
66 #insn, op1, (uint64_t)v2, cc); \
70 #define run_scomp_reg_reg(insn) \ argument
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Dfpconv.c16 #define I2F(insn, initial, target_type) \ argument
20 asm volatile(insn " %0,%1\n\t" :"=f" (target) :"d"(source)); \
21 printf(insn " %"PRId64" -> %f\n", source, target); \
24 #define DO_INSN_I32_TO_F(insn, target_type) \ argument
27 I2F(insn, 0, target_type); \
28 I2F(insn, 1, target_type); \
29 I2F(insn, -1, target_type); \
30 I2F(insn, 42, target_type); \
31 I2F(insn, SHRT_MAX, target_type); \
32 I2F(insn, SHRT_MIN, target_type); \
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Ddfpext.c7 #define L2D(insn, initial, target,round) \ argument
11 asm volatile(insn(round,0,0,2) :"=f" (_t):"d"(source)); \
15 #define I2D(insn, initial, target,round) \ argument
19 asm volatile(insn(round,0,0,2) :"=f" (_t):"d"(source)); \
23 #define D2L(insn, initial, type, round, cc) \ argument
27 asm volatile(insn(round,0,2,0) \
34 #define D2I(insn, initial, type, round, cc) \ argument
38 asm volatile(insn(round,0,2,0) \
46 #define DO_PRINT_L2D(insn, l, d, round) \ argument
48 printf(#insn " round=%d %lu -> ", 0x##round, l); \
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Dcondloadstore.c5 #define LOAD_REG_MEM(insn, s, ccset, initial, mask) \ argument
19 insn(1,mask,5,000,00) \
23 printf(#insn " %16.16lX into %16.16lX if mask" \
29 #define LOAD_REG_REG(insn, s, ccset, initial, mask) \ argument
42 insn(mask,1,2) \
46 printf(#insn " %16.16lX into %16.16lX if mask" \
51 #define STORE_REG_REG(insn, s, ccset, initial, mask) \ argument
65 insn(1,mask,5,000,00) \
69 printf(#insn " %16.16lX into %16.16lX if mask" \
75 #define INSNVALCCINIT(insn, value, ccset, INIT, FUNC) \ argument
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Ddfpconv.c7 #define I2D(insn, initial, target,round) \ argument
11 asm volatile(insn(round,0,0,2) :"=f" (_t):"d"(source)); \
15 #define D2I(insn, initial, type, round, cc) \ argument
19 asm volatile(insn(round,0,2,0) \
27 #define DO_PRINT_I2D(insn, l, d, round) \ argument
29 printf(#insn " round=%d %d -> ", 0x##round, l); \
30 d = I2D(insn, l, d, round); \
35 #define DO_INSN_I2D(insn, round, type) \ argument
38 DO_PRINT_I2D(insn, 0, d, round); \
39 DO_PRINT_I2D(insn, 1, d, round); \
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/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_eu_emit.c44 struct brw_instruction *insn, in guess_execution_size() argument
48 insn->header.execution_size = BRW_EXECUTE_16; in guess_execution_size()
50 insn->header.execution_size = reg.width; /* note - definitions are compatible */ in guess_execution_size()
104 brw_set_dest(struct brw_compile *p, struct brw_instruction *insn, in brw_set_dest() argument
113 insn->bits1.da1.dest_reg_file = dest.file; in brw_set_dest()
114 insn->bits1.da1.dest_reg_type = dest.type; in brw_set_dest()
115 insn->bits1.da1.dest_address_mode = dest.address_mode; in brw_set_dest()
118 insn->bits1.da1.dest_reg_nr = dest.nr; in brw_set_dest()
120 if (insn->header.access_mode == BRW_ALIGN_1) { in brw_set_dest()
121 insn->bits1.da1.dest_subreg_nr = dest.subnr; in brw_set_dest()
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/external/google-breakpad/src/third_party/libdisasm/
Dia32_insn.c56 static void ia32_stack_mod(x86_insn_t *insn) { in ia32_stack_mod() argument
59 if (! insn || ! insn->operands ) { in ia32_stack_mod()
63 dest = &insn->operands->op; in ia32_stack_mod()
65 src = &insn->operands->next->op; in ia32_stack_mod()
68 insn->stack_mod = 0; in ia32_stack_mod()
69 insn->stack_mod_val = 0; in ia32_stack_mod()
71 switch ( insn->type ) { in ia32_stack_mod()
74 insn->stack_mod = 1; in ia32_stack_mod()
75 insn->stack_mod_val = insn->addr_size * -1; in ia32_stack_mod()
78 insn->stack_mod = 1; in ia32_stack_mod()
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Dx86_insn.c11 int x86_insn_is_valid( x86_insn_t *insn ) { in x86_insn_is_valid() argument
12 if ( insn && insn->type != insn_invalid && insn->size > 0 ) { in x86_insn_is_valid()
19 uint32_t x86_get_address( x86_insn_t *insn ) { in x86_get_address() argument
21 if (! insn || ! insn->operands ) { in x86_get_address()
25 for (op_lst = insn->operands; op_lst; op_lst = op_lst->next ) { in x86_get_address()
40 int32_t x86_get_rel_offset( x86_insn_t *insn ) { in x86_get_rel_offset() argument
42 if (! insn || ! insn->operands ) { in x86_get_rel_offset()
46 for (op_lst = insn->operands; op_lst; op_lst = op_lst->next ) { in x86_get_rel_offset()
57 x86_op_t * x86_get_branch_target( x86_insn_t *insn ) { in x86_get_branch_target() argument
59 if (! insn || ! insn->operands ) { in x86_get_branch_target()
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Dx86_operand_list.c5 static void x86_oplist_append( x86_insn_t *insn, x86_oplist_t *op ) { in x86_oplist_append() argument
8 if (! insn ) { in x86_oplist_append()
12 list = insn->operands; in x86_oplist_append()
14 insn->operand_count = 1; in x86_oplist_append()
20 insn->explicit_count = 1; in x86_oplist_append()
21 insn->operands = op; in x86_oplist_append()
29 insn->operand_count = insn->operand_count + 1; in x86_oplist_append()
30 insn->explicit_count = insn->explicit_count + 1; in x86_oplist_append()
36 x86_op_t * x86_operand_new( x86_insn_t *insn ) { in x86_operand_new() argument
39 if (! insn ) { in x86_operand_new()
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Dx86_disasm.c18 x86_insn_t *insn ){ in x86_disasm() argument
22 if ( ! buf || ! insn || ! buf_len ) { in x86_disasm()
29 memset( insn, 0, sizeof(x86_insn_t) ); in x86_disasm()
30 insn->addr = buf_rva + offset; in x86_disasm()
31 insn->offset = offset; in x86_disasm()
33 insn->type = insn_invalid; in x86_disasm()
34 insn->group = insn_none; in x86_disasm()
52 size = ia32_disasm_addr( bytes, len, insn); in x86_disasm()
63 MAKE_INVALID( insn, bytes ); in x86_disasm()
68 memcpy( insn->bytes, bytes, size ); in x86_disasm()
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Dx86_format.c645 static int format_operand_att( x86_op_t *op, x86_insn_t *insn, char *buf, in format_operand_att() argument
665 insn->addr + insn->size), len ); in format_operand_att()
672 insn->addr + insn->size), len ); in format_operand_att()
676 insn->addr + insn->size), len ); in format_operand_att()
694 if (insn->type == insn_jmp || insn->type == insn_call) in format_operand_att()
703 if (insn->type == insn_jmp || insn->type == insn_call) in format_operand_att()
719 static int format_operand_native( x86_op_t *op, x86_insn_t *insn, char *buf, in format_operand_native() argument
737 insn->addr + insn->size), len ); in format_operand_native()
744 insn->addr + insn->size), len ); in format_operand_native()
748 insn->addr + insn->size, len ); in format_operand_native()
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/external/libchrome/sandbox/linux/bpf_dsl/
Dverifier.cc35 void Ld(State* state, const struct sock_filter& insn, const char** err) { in Ld() argument
36 if (BPF_SIZE(insn.code) != BPF_W || BPF_MODE(insn.code) != BPF_ABS || in Ld()
37 insn.jt != 0 || insn.jf != 0) { in Ld()
41 if (insn.k < sizeof(struct arch_seccomp_data) && (insn.k & 3) == 0) { in Ld()
44 reinterpret_cast<const char*>(&state->data) + insn.k, 4); in Ld()
53 void Jmp(State* state, const struct sock_filter& insn, const char** err) { in Jmp() argument
54 if (BPF_OP(insn.code) == BPF_JA) { in Jmp()
55 if (state->ip + insn.k + 1 >= state->program.size() || in Jmp()
56 state->ip + insn.k + 1 <= state->ip) { in Jmp()
61 state->ip += insn.k; in Jmp()
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Ddump_bpf.cc81 void AppendInstruction(std::string* dst, size_t pc, const sock_filter& insn) { in AppendInstruction() argument
83 switch (BPF_CLASS(insn.code)) { in AppendInstruction()
85 if (insn.code == BPF_LD + BPF_W + BPF_ABS) { in AppendInstruction()
86 base::StringAppendF(dst, "LOAD %" PRIu32 " // ", insn.k); in AppendInstruction()
88 (insn.k - offsetof(struct arch_seccomp_data, args)) / in AppendInstruction()
90 if (maybe_argno < 6 && insn.k == SECCOMP_ARG_LSB_IDX(maybe_argno)) { in AppendInstruction()
93 insn.k == SECCOMP_ARG_MSB_IDX(maybe_argno)) { in AppendInstruction()
96 base::StringAppendF(dst, "%s\n", DataOffsetName(insn.k)); in AppendInstruction()
103 if (BPF_OP(insn.code) == BPF_JA) { in AppendInstruction()
104 base::StringAppendF(dst, "JMP %zu\n", pc + insn.k + 1); in AppendInstruction()
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/external/mockito/cglib-and-asm/src/org/mockito/asm/tree/
DInsnList.java130 public boolean contains(final AbstractInsnNode insn) { in contains() argument
132 while (i != null && i != insn) { in contains()
153 public int indexOf(final AbstractInsnNode insn) { in indexOf() argument
154 if (check && !contains(insn)) { in indexOf()
160 return insn.index; in indexOf()
169 AbstractInsnNode insn = first; in accept() local
170 while (insn != null) { in accept()
171 insn.accept(mv); in accept()
172 insn = insn.next; in accept()
221 public void set(final AbstractInsnNode location, final AbstractInsnNode insn) { in set() argument
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/external/dexmaker/src/dx/java/com/android/dx/io/instructions/
DInstructionCodec.java40 @Override public void encode(DecodedInstruction insn, CodeOutput out) { in FORMAT_00X() argument
41 out.write(insn.getOpcodeUnit()); in FORMAT_00X()
55 @Override public void encode(DecodedInstruction insn, CodeOutput out) { in FORMAT_10X() argument
56 out.write(insn.getOpcodeUnit()); in FORMAT_10X()
72 @Override public void encode(DecodedInstruction insn, CodeOutput out) { in FORMAT_12X() argument
74 codeUnit(insn.getOpcodeUnit(), in FORMAT_12X()
75 makeByte(insn.getA(), insn.getB()))); in FORMAT_12X()
91 @Override public void encode(DecodedInstruction insn, CodeOutput out) { in FORMAT_11N() argument
93 codeUnit(insn.getOpcodeUnit(), in FORMAT_11N()
94 makeByte(insn.getA(), insn.getLiteralNibble()))); in FORMAT_11N()
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/external/dexmaker/src/dx/java/com/android/dx/dex/code/
DOutputFinisher.java114 private static boolean hasLocalInfo(DalvInsn insn) { in hasLocalInfo() argument
115 if (insn instanceof LocalSnapshot) { in hasLocalInfo()
116 RegisterSpecSet specs = ((LocalSnapshot) insn).getLocals(); in hasLocalInfo()
123 } else if (insn instanceof LocalStart) { in hasLocalInfo()
124 RegisterSpec spec = ((LocalStart) insn).getLocal(); in hasLocalInfo()
155 for (DalvInsn insn : insns) { in getAllConstants()
156 addConstants(result, insn); in getAllConstants()
170 DalvInsn insn) { in addConstants() argument
171 if (insn instanceof CstInsn) { in addConstants()
172 Constant cst = ((CstInsn) insn).getConstant(); in addConstants()
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DRopTranslator.java191 public void visitPlainCstInsn(PlainCstInsn insn) { in calculateParamsAreInOrder()
192 if (insn.getOpcode().getOpcode()== RegOps.MOVE_PARAM) { in calculateParamsAreInOrder()
194 ((CstInteger) insn.getConstant()).getValue(); in calculateParamsAreInOrder()
198 == insn.getResult().getReg()); in calculateParamsAreInOrder()
299 TargetInsn insn = in outputBlock() local
303 output.add(insn); in outputBlock()
453 private static RegisterSpecList getRegs(Insn insn) { in getRegs() argument
454 return getRegs(insn, insn.getResult()); in getRegs()
467 private static RegisterSpecList getRegs(Insn insn, in getRegs() argument
469 RegisterSpecList regs = insn.getSources(); in getRegs()
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/external/mockito/cglib-and-asm/src/org/mockito/asm/tree/analysis/
DFrame.java196 final AbstractInsnNode insn, in execute() argument
203 switch (insn.getOpcode()) { in execute()
224 push(interpreter.newOperation(insn)); in execute()
231 push(interpreter.copyOperation(insn, in execute()
232 getLocal(((VarInsnNode) insn).var))); in execute()
244 push(interpreter.binaryOperation(insn, value1, value2)); in execute()
251 value1 = interpreter.copyOperation(insn, pop()); in execute()
252 var = ((VarInsnNode) insn).var; in execute()
275 interpreter.ternaryOperation(insn, value1, value2, value3); in execute()
294 push(interpreter.copyOperation(insn, value1)); in execute()
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DAnalyzer.java173 int insn = queue[--top]; in analyze() local
174 Frame f = frames[insn]; in analyze()
175 Subroutine subroutine = subroutines[insn]; in analyze()
176 queued[insn] = false; in analyze()
179 AbstractInsnNode insnNode = m.instructions.get(insn); in analyze()
187 merge(insn + 1, f, subroutine); in analyze()
188 newControlFlowEdge(insn, insn + 1); in analyze()
196 merge(insn + 1, current, subroutine); in analyze()
197 newControlFlowEdge(insn, insn + 1); in analyze()
207 newControlFlowEdge(insn, jump); in analyze()
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/external/mesa3d/src/gallium/drivers/nv50/codegen/
Dnv50_ir_build_util.cpp68 Instruction *insn = new_Instruction(func, op, ty); in mkOp1() local
70 insn->setDef(0, dst); in mkOp1()
71 insn->setSrc(0, src); in mkOp1()
73 insert(insn); in mkOp1()
74 return insn; in mkOp1()
81 Instruction *insn = new_Instruction(func, op, ty); in mkOp2() local
83 insn->setDef(0, dst); in mkOp2()
84 insn->setSrc(0, src0); in mkOp2()
85 insn->setSrc(1, src1); in mkOp2()
87 insert(insn); in mkOp2()
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/external/dexmaker/src/dx/java/com/android/dx/ssa/
DNormalSsaInsn.java26 private Insn insn; field in NormalSsaInsn
34 NormalSsaInsn(final Insn insn, final SsaBasicBlock block) { in NormalSsaInsn() argument
35 super(insn.getResult(), block); in NormalSsaInsn()
36 this.insn = insn; in NormalSsaInsn()
42 RegisterSpecList oldSources = insn.getSources(); in mapSourceRegisters()
46 insn = insn.withNewRegisters(getResult(), newSources); in mapSourceRegisters()
59 RegisterSpecList origSources = insn.getSources(); in changeOneSource()
78 insn = insn.withNewRegisters(getResult(), newSources); in changeOneSource()
88 RegisterSpecList origSources = insn.getSources(); in setNewSources()
94 insn = insn.withNewRegisters(getResult(), newSources); in setNewSources()
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/external/valgrind/VEX/priv/
Dhost_s390_defs.c364 ppS390Instr(const s390_insn *insn, Bool mode64) in ppS390Instr() argument
366 vex_printf("%s", s390_insn_as_string(insn)); in ppS390Instr()
442 getRegUsage_S390Instr(HRegUsage *u, const s390_insn *insn, Bool mode64) in getRegUsage_S390Instr() argument
444 s390_insn_get_reg_usage(u, insn); in getRegUsage_S390Instr()
450 mapRegs_S390Instr(HRegRemap *m, s390_insn *insn, Bool mode64) in mapRegs_S390Instr() argument
452 s390_insn_map_regs(m, insn); in mapRegs_S390Instr()
460 isMove_S390Instr(const s390_insn *insn, HReg *src, HReg *dst) in isMove_S390Instr() argument
462 return s390_insn_is_reg_reg_move(insn, src, dst); in isMove_S390Instr()
543 s390_insn_get_reg_usage(HRegUsage *u, const s390_insn *insn) in s390_insn_get_reg_usage() argument
547 switch (insn->tag) { in s390_insn_get_reg_usage()
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12345678910>>...13