| /external/vixl/src/vixl/a64/ |
| D | decoder-a64.cc | 33 void Decoder::DecodeInstruction(const Instruction *instr) { in DecodeInstruction() argument
34 if (instr->Bits(28, 27) == 0) { in DecodeInstruction()
35 VisitUnallocated(instr); in DecodeInstruction()
37 switch (instr->Bits(27, 24)) { in DecodeInstruction()
39 case 0x0: DecodePCRelAddressing(instr); break; in DecodeInstruction()
42 case 0x1: DecodeAddSubImmediate(instr); break; in DecodeInstruction()
55 case 0xB: DecodeDataProcessing(instr); break; in DecodeInstruction()
59 case 0x2: DecodeLogical(instr); break; in DecodeInstruction()
63 case 0x3: DecodeBitfieldExtract(instr); break; in DecodeInstruction()
76 case 0x7: DecodeBranchSystemException(instr); break; in DecodeInstruction()
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| D | instrument-a64.cc | 257 void Instrument::VisitPCRelAddressing(const Instruction* instr) { in VisitPCRelAddressing() argument
258 USE(instr); in VisitPCRelAddressing()
265 void Instrument::VisitAddSubImmediate(const Instruction* instr) { in VisitAddSubImmediate() argument
266 USE(instr); in VisitAddSubImmediate()
273 void Instrument::VisitLogicalImmediate(const Instruction* instr) { in VisitLogicalImmediate() argument
274 USE(instr); in VisitLogicalImmediate()
281 void Instrument::VisitMoveWideImmediate(const Instruction* instr) { in VisitMoveWideImmediate() argument
285 if (instr->IsMovn() && (instr->Rd() == kZeroRegCode)) { in VisitMoveWideImmediate()
286 unsigned imm = instr->ImmMoveWide(); in VisitMoveWideImmediate()
294 void Instrument::VisitBitfield(const Instruction* instr) { in VisitBitfield() argument
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| D | disasm-a64.cc | 62 void Disassembler::VisitAddSubImmediate(const Instruction* instr) { in VisitAddSubImmediate() argument
63 bool rd_is_zr = RdIsZROrSP(instr); in VisitAddSubImmediate()
64 bool stack_op = (rd_is_zr || RnIsZROrSP(instr)) && in VisitAddSubImmediate()
65 (instr->ImmAddSub() == 0) ? true : false; in VisitAddSubImmediate()
71 switch (instr->Mask(AddSubImmediateMask)) { in VisitAddSubImmediate()
103 Format(instr, mnemonic, form); in VisitAddSubImmediate()
107 void Disassembler::VisitAddSubShifted(const Instruction* instr) { in VisitAddSubShifted() argument
108 bool rd_is_zr = RdIsZROrSP(instr); in VisitAddSubShifted()
109 bool rn_is_zr = RnIsZROrSP(instr); in VisitAddSubShifted()
115 switch (instr->Mask(AddSubShiftedMask)) { in VisitAddSubShifted()
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| D | disasm-a64.h | 46 #define DECLARE(A) virtual void Visit##A(const Instruction* instr);
51 virtual void ProcessOutput(const Instruction* instr);
59 virtual void AppendRegisterNameToOutput(const Instruction* instr,
64 virtual void AppendPCRelativeOffsetToOutput(const Instruction* instr,
69 virtual void AppendCodeRelativeAddressToOutput(const Instruction* instr,
77 virtual void AppendCodeRelativeCodeAddressToOutput(const Instruction* instr,
83 virtual void AppendCodeRelativeDataAddressToOutput(const Instruction* instr,
88 virtual void AppendAddressToOutput(const Instruction* instr,
90 virtual void AppendCodeAddressToOutput(const Instruction* instr,
92 virtual void AppendDataAddressToOutput(const Instruction* instr,
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| /external/v8/src/arm64/ |
| D | decoder-arm64-inl.h | 19 void Decoder<V>::Decode(Instruction *instr) { in Decode() argument
20 if (instr->Bits(28, 27) == 0) { in Decode()
21 V::VisitUnallocated(instr); in Decode()
23 switch (instr->Bits(27, 24)) { in Decode()
25 case 0x0: DecodePCRelAddressing(instr); break; in Decode()
28 case 0x1: DecodeAddSubImmediate(instr); break; in Decode()
41 case 0xB: DecodeDataProcessing(instr); break; in Decode()
45 case 0x2: DecodeLogical(instr); break; in Decode()
49 case 0x3: DecodeBitfieldExtract(instr); break; in Decode()
62 case 0x7: DecodeBranchSystemException(instr); break; in Decode()
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| D | disasm-arm64.cc | 48 void DisassemblingDecoder::VisitAddSubImmediate(Instruction* instr) { in VisitAddSubImmediate() argument
49 bool rd_is_zr = RdIsZROrSP(instr); in VisitAddSubImmediate()
50 bool stack_op = (rd_is_zr || RnIsZROrSP(instr)) && in VisitAddSubImmediate()
51 (instr->ImmAddSub() == 0) ? true : false; in VisitAddSubImmediate()
57 switch (instr->Mask(AddSubImmediateMask)) { in VisitAddSubImmediate()
89 Format(instr, mnemonic, form); in VisitAddSubImmediate()
93 void DisassemblingDecoder::VisitAddSubShifted(Instruction* instr) { in VisitAddSubShifted() argument
94 bool rd_is_zr = RdIsZROrSP(instr); in VisitAddSubShifted()
95 bool rn_is_zr = RnIsZROrSP(instr); in VisitAddSubShifted()
101 switch (instr->Mask(AddSubShiftedMask)) { in VisitAddSubShifted()
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| /external/v8/src/arm/ |
| D | disasm-arm.cc | 77 int FormatVFPRegister(Instruction* instr, const char* format);
78 void PrintMovwMovt(Instruction* instr);
79 int FormatVFPinstruction(Instruction* instr, const char* format);
80 void PrintCondition(Instruction* instr);
81 void PrintShiftRm(Instruction* instr);
82 void PrintShiftImm(Instruction* instr);
83 void PrintShiftSat(Instruction* instr);
84 void PrintPU(Instruction* instr);
88 int FormatRegister(Instruction* instr, const char* option);
91 int FormatOption(Instruction* instr, const char* option);
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| D | simulator-arm.cc | 37 void Stop(Instruction* instr);
82 void ArmDebugger::Stop(Instruction* instr) { in Stop() argument
84 uint32_t code = instr->SvcValue() & kStopCodeMask; in Stop()
102 instr->SetInstructionBits(kNopInstr); in Stop()
114 void ArmDebugger::Stop(Instruction* instr) { in Stop() argument
116 uint32_t code = instr->SvcValue() & kStopCodeMask; in Stop()
686 Instruction* instr) { in CheckICache() argument
687 intptr_t address = reinterpret_cast<intptr_t>(instr); in CheckICache()
698 memcmp(reinterpret_cast<void*>(instr), in CheckICache()
1101 int Simulator::ReadW(int32_t addr, Instruction* instr) { in ReadW() argument
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| /external/v8/src/mips64/ |
| D | disasm-mips64.cc | 71 void PrintRs(Instruction* instr);
72 void PrintRt(Instruction* instr);
73 void PrintRd(Instruction* instr);
74 void PrintFs(Instruction* instr);
75 void PrintFt(Instruction* instr);
76 void PrintFd(Instruction* instr);
77 void PrintSa(Instruction* instr);
78 void PrintLsaSa(Instruction* instr);
79 void PrintSd(Instruction* instr);
80 void PrintSs1(Instruction* instr);
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| /external/v8/src/mips/ |
| D | disasm-mips.cc | 70 void PrintRs(Instruction* instr);
71 void PrintRt(Instruction* instr);
72 void PrintRd(Instruction* instr);
73 void PrintFs(Instruction* instr);
74 void PrintFt(Instruction* instr);
75 void PrintFd(Instruction* instr);
76 void PrintSa(Instruction* instr);
77 void PrintLsaSa(Instruction* instr);
78 void PrintSd(Instruction* instr);
79 void PrintSs1(Instruction* instr);
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| /external/v8/src/ppc/ |
| D | disasm-ppc.cc | 69 int FormatFPRegister(Instruction* instr, const char* format);
73 int FormatRegister(Instruction* instr, const char* option);
74 int FormatOption(Instruction* instr, const char* option);
75 void Format(Instruction* instr, const char* format);
76 void Unknown(Instruction* instr);
77 void UnknownFormat(Instruction* instr, const char* opcname);
79 void DecodeExt1(Instruction* instr);
80 void DecodeExt2(Instruction* instr);
81 void DecodeExt3(Instruction* instr);
82 void DecodeExt4(Instruction* instr);
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| /external/v8/src/crankshaft/mips64/ |
| D | lithium-mips64.cc | 166 LInstruction* LChunkBuilder::DoDebugBreak(HDebugBreak* instr) { in DoDebugBreak() argument
526 HInstruction* instr = HInstruction::cast(value); in Use() local
527 VisitInstruction(instr); in Use()
534 LInstruction* LChunkBuilder::Define(LTemplateResultInstruction<1>* instr, in Define() argument
537 instr->set_result(result); in Define()
538 return instr; in Define()
543 LTemplateResultInstruction<1>* instr) { in DefineAsRegister() argument
544 return Define(instr, in DefineAsRegister()
550 LTemplateResultInstruction<1>* instr, int index) { in DefineAsSpilled() argument
551 return Define(instr, in DefineAsSpilled()
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| /external/v8/src/crankshaft/ppc/ |
| D | lithium-ppc.cc | 532 HInstruction* instr = HInstruction::cast(value); in Use() local
533 VisitInstruction(instr); in Use()
540 LInstruction* LChunkBuilder::Define(LTemplateResultInstruction<1>* instr, in Define() argument
543 instr->set_result(result); in Define()
544 return instr; in Define()
549 LTemplateResultInstruction<1>* instr) { in DefineAsRegister() argument
550 return Define(instr, in DefineAsRegister()
556 LTemplateResultInstruction<1>* instr, int index) { in DefineAsSpilled() argument
557 return Define(instr, in DefineAsSpilled()
563 LTemplateResultInstruction<1>* instr) { in DefineSameAsFirst() argument
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| /external/v8/src/crankshaft/mips/ |
| D | lithium-mips.cc | 166 LInstruction* LChunkBuilder::DoDebugBreak(HDebugBreak* instr) { in DoDebugBreak() argument
526 HInstruction* instr = HInstruction::cast(value); in Use() local
527 VisitInstruction(instr); in Use()
534 LInstruction* LChunkBuilder::Define(LTemplateResultInstruction<1>* instr, in Define() argument
537 instr->set_result(result); in Define()
538 return instr; in Define()
543 LTemplateResultInstruction<1>* instr) { in DefineAsRegister() argument
544 return Define(instr, in DefineAsRegister()
550 LTemplateResultInstruction<1>* instr, int index) { in DefineAsSpilled() argument
551 return Define(instr, in DefineAsSpilled()
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| D | lithium-codegen-mips.cc | 179 void LCodeGen::DoPrologue(LPrologue* instr) { in DoPrologue() argument
256 void LCodeGen::GenerateBodyInstructionPre(LInstruction* instr) { in GenerateBodyInstructionPre() argument
257 if (instr->IsCall()) { in GenerateBodyInstructionPre()
260 if (!instr->IsLazyBailout() && !instr->IsGap()) { in GenerateBodyInstructionPre()
280 code->instr()->hydrogen_value()->id(), in GenerateDeferredCode()
281 code->instr()->Mnemonic()); in GenerateDeferredCode()
676 LInstruction* instr) { in CallCode() argument
677 CallCodeGeneric(code, mode, instr, RECORD_SIMPLE_SAFEPOINT); in CallCode()
683 LInstruction* instr, in CallCodeGeneric() argument
685 DCHECK(instr != NULL); in CallCodeGeneric()
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| /external/v8/src/crankshaft/x87/ |
| D | lithium-x87.cc | 574 HInstruction* instr = HInstruction::cast(value); in Use() local
575 VisitInstruction(instr); in Use()
582 LInstruction* LChunkBuilder::Define(LTemplateResultInstruction<1>* instr, in Define() argument
585 instr->set_result(result); in Define()
586 return instr; in Define()
591 LTemplateResultInstruction<1>* instr) { in DefineAsRegister() argument
592 return Define(instr, in DefineAsRegister()
598 LTemplateResultInstruction<1>* instr, in DefineAsSpilled() argument
600 return Define(instr, in DefineAsSpilled()
606 LTemplateResultInstruction<1>* instr) { in DefineSameAsFirst() argument
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| D | lithium-codegen-x87.cc | 206 void LCodeGen::DoPrologue(LPrologue* instr) { in DoPrologue() argument
323 void LCodeGen::GenerateBodyInstructionPre(LInstruction* instr) { in GenerateBodyInstructionPre() argument
324 if (instr->IsCall()) { in GenerateBodyInstructionPre()
327 if (!instr->IsLazyBailout() && !instr->IsGap()) { in GenerateBodyInstructionPre()
330 FlushX87StackIfNecessary(instr); in GenerateBodyInstructionPre()
334 void LCodeGen::GenerateBodyInstructionPost(LInstruction* instr) { in GenerateBodyInstructionPost() argument
336 if (instr->IsCall() && instr->ClobbersDoubleRegisters(isolate())) { in GenerateBodyInstructionPost()
337 bool double_result = instr->HasDoubleRegisterResult(); in GenerateBodyInstructionPost()
348 if (instr->IsGoto()) { in GenerateBodyInstructionPost()
349 x87_stack_.LeavingBlock(current_block_, LGoto::cast(instr), this); in GenerateBodyInstructionPost()
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| /external/v8/src/crankshaft/ia32/ |
| D | lithium-ia32.cc | 568 HInstruction* instr = HInstruction::cast(value); in Use() local
569 VisitInstruction(instr); in Use()
576 LInstruction* LChunkBuilder::Define(LTemplateResultInstruction<1>* instr, in Define() argument
579 instr->set_result(result); in Define()
580 return instr; in Define()
585 LTemplateResultInstruction<1>* instr) { in DefineAsRegister() argument
586 return Define(instr, in DefineAsRegister()
592 LTemplateResultInstruction<1>* instr, in DefineAsSpilled() argument
594 return Define(instr, in DefineAsSpilled()
600 LTemplateResultInstruction<1>* instr) { in DefineSameAsFirst() argument
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| D | lithium-codegen-ia32.cc | 235 void LCodeGen::DoPrologue(LPrologue* instr) { in DoPrologue() argument
352 void LCodeGen::GenerateBodyInstructionPre(LInstruction* instr) { in GenerateBodyInstructionPre() argument
353 if (instr->IsCall()) { in GenerateBodyInstructionPre()
356 if (!instr->IsLazyBailout() && !instr->IsGap()) { in GenerateBodyInstructionPre()
362 void LCodeGen::GenerateBodyInstructionPost(LInstruction* instr) { } in GenerateBodyInstructionPost() argument
447 code->instr()->hydrogen_value()->id(), in GenerateDeferredCode()
448 code->instr()->Mnemonic()); in GenerateDeferredCode()
702 LInstruction* instr, in CallCodeGeneric() argument
704 DCHECK(instr != NULL); in CallCodeGeneric()
706 RecordSafepointWithLazyDeopt(instr, safepoint_mode); in CallCodeGeneric()
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| /external/v8/src/crankshaft/x64/ |
| D | lithium-x64.cc | 552 HInstruction* instr = HInstruction::cast(value); in Use() local
553 VisitInstruction(instr); in Use()
560 LInstruction* LChunkBuilder::Define(LTemplateResultInstruction<1>* instr, in Define() argument
563 instr->set_result(result); in Define()
564 return instr; in Define()
569 LTemplateResultInstruction<1>* instr) { in DefineAsRegister() argument
570 return Define(instr, in DefineAsRegister()
576 LTemplateResultInstruction<1>* instr, in DefineAsSpilled() argument
578 return Define(instr, in DefineAsSpilled()
584 LTemplateResultInstruction<1>* instr) { in DefineSameAsFirst() argument
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| D | lithium-codegen-x64.cc | 174 void LCodeGen::DoPrologue(LPrologue* instr) { in DoPrologue() argument
251 void LCodeGen::GenerateBodyInstructionPre(LInstruction* instr) { in GenerateBodyInstructionPre() argument
252 if (instr->IsCall()) { in GenerateBodyInstructionPre()
255 if (!instr->IsLazyBailout() && !instr->IsGap()) { in GenerateBodyInstructionPre()
261 void LCodeGen::GenerateBodyInstructionPost(LInstruction* instr) { in GenerateBodyInstructionPost() argument
262 if (FLAG_debug_code && FLAG_enable_slow_asserts && instr->HasResult() && in GenerateBodyInstructionPost()
263 instr->hydrogen_value()->representation().IsInteger32() && in GenerateBodyInstructionPost()
264 instr->result()->IsRegister()) { in GenerateBodyInstructionPost()
265 __ AssertZeroExtended(ToRegister(instr->result())); in GenerateBodyInstructionPost()
268 if (instr->HasResult() && instr->MustSignExtendResult(chunk())) { in GenerateBodyInstructionPost()
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| /external/v8/src/crankshaft/arm/ |
| D | lithium-arm.cc | 519 HInstruction* instr = HInstruction::cast(value); in Use() local
520 VisitInstruction(instr); in Use()
527 LInstruction* LChunkBuilder::Define(LTemplateResultInstruction<1>* instr, in Define() argument
530 instr->set_result(result); in Define()
531 return instr; in Define()
536 LTemplateResultInstruction<1>* instr) { in DefineAsRegister() argument
537 return Define(instr, in DefineAsRegister()
543 LTemplateResultInstruction<1>* instr, int index) { in DefineAsSpilled() argument
544 return Define(instr, in DefineAsSpilled()
550 LTemplateResultInstruction<1>* instr) { in DefineSameAsFirst() argument
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| D | lithium-codegen-arm.cc | 159 void LCodeGen::DoPrologue(LPrologue* instr) { in DoPrologue() argument
241 void LCodeGen::GenerateBodyInstructionPre(LInstruction* instr) { in GenerateBodyInstructionPre() argument
242 if (instr->IsCall()) { in GenerateBodyInstructionPre()
245 if (!instr->IsLazyBailout() && !instr->IsGap()) { in GenerateBodyInstructionPre()
265 code->instr()->hydrogen_value()->id(), in GenerateDeferredCode()
266 code->instr()->Mnemonic()); in GenerateDeferredCode()
688 LInstruction* instr, in CallCode() argument
690 CallCodeGeneric(code, mode, instr, RECORD_SIMPLE_SAFEPOINT, storage_mode); in CallCode()
696 LInstruction* instr, in CallCodeGeneric() argument
699 DCHECK(instr != NULL); in CallCodeGeneric()
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| /external/v8/src/crankshaft/arm64/ |
| D | lithium-arm64.cc | 372 HInstruction* instr = HInstruction::cast(value); in Use() local
373 VisitInstruction(instr); in Use()
430 LInstruction* LChunkBuilder::Define(LTemplateResultInstruction<1>* instr, in Define() argument
433 instr->set_result(result); in Define()
434 return instr; in Define()
439 LTemplateResultInstruction<1>* instr) { in DefineAsRegister() argument
440 return Define(instr, in DefineAsRegister()
446 LTemplateResultInstruction<1>* instr, int index) { in DefineAsSpilled() argument
447 return Define(instr, in DefineAsSpilled()
453 LTemplateResultInstruction<1>* instr) { in DefineSameAsFirst() argument
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| D | lithium-codegen-arm64.cc | 344 LInstruction* instr) { in CallCode() argument
345 CallCodeGeneric(code, mode, instr, RECORD_SIMPLE_SAFEPOINT); in CallCode()
351 LInstruction* instr, in CallCodeGeneric() argument
353 DCHECK(instr != NULL); in CallCodeGeneric()
357 RecordSafepointWithLazyDeopt(instr, safepoint_mode); in CallCodeGeneric()
368 void LCodeGen::DoCallFunction(LCallFunction* instr) { in DoCallFunction() argument
369 DCHECK(ToRegister(instr->context()).is(cp)); in DoCallFunction()
370 DCHECK(ToRegister(instr->function()).Is(x1)); in DoCallFunction()
371 DCHECK(ToRegister(instr->result()).Is(x0)); in DoCallFunction()
373 int arity = instr->arity(); in DoCallFunction()
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