Searched refs:isBeforeLegalize (Results 1 – 9 of 9) sorted by relevance
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 1650 if (!DCI.isBeforeLegalize() || in performUCharToFloatCombine()
1656 assert(DCI.isBeforeLegalize() && "Unexpected legal type"); in performUCharToFloatCombine()
1802 if (DCI.isBeforeLegalize()) in performAndCombine()
2017 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in PerformDAGCombine()
2130 if (DCI.isBeforeLegalize()) in PerformDAGCombine()
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| D | AMDGPUISelLowering.cpp | 2356 if (!DCI.isBeforeLegalize()) in performStoreCombine()
2563 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in PerformDAGCombine()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 1341 DCI.isBeforeLegalize() && N0->hasOneUse()) { in SimplifySetCC()
1395 if (DCI.isBeforeLegalize() && in SimplifySetCC()
1715 EVT ShiftTy = DCI.isBeforeLegalize() in SimplifySetCC()
1750 EVT ShiftTy = DCI.isBeforeLegalize() in SimplifySetCC()
1782 EVT ShiftTy = DCI.isBeforeLegalize() in SimplifySetCC()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1635 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in PerformDAGCombine()
1652 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in PerformDAGCombine()
1816 if (!DCI.isBeforeLegalize() || in PerformDAGCombine()
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| /external/llvm/include/llvm/Target/ |
| D | TargetLowering.h | 2182 bool isBeforeLegalize() const { return Level == BeforeLegalizeTypes; } in isBeforeLegalize() function
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 531 if (DCI.isBeforeLegalize()) in performADDECombine()
786 if (DCI.isBeforeLegalize()) in performSUBECombine()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 8595 if (!DCI.isBeforeLegalize()) in split16BStores()
8763 TargetLowering::TargetLoweringOpt TLO(DAG, DCI.isBeforeLegalize(), in performTBISimplification()
9054 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in performNEONPostLDSTCombine()
9570 assert(DCI.isBeforeLegalize() || in performSelectCombine()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 8384 if (DCI.isBeforeLegalize() || !Subtarget->hasNEON() in AddCombineToVPADDL()
8483 if (DCI.isBeforeLegalize()) return SDValue(); in AddCombineTo64bitMLAL()
8730 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in PerformMULCombine()
9693 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in PerformVLDCombine()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 23526 if (!DCI.isBeforeLegalize() && !TLI.isTypeLegal(VT.getVectorElementType())) in PerformShuffleCombine()
23552 if (!DCI.isBeforeLegalize() && DCI.isBeforeLegalizeOps() && in PerformShuffleCombine()
24385 !DCI.isBeforeLegalize() && !VT.is512BitVector()) { in PerformSELECTCombine()
24396 !DCI.isBeforeLegalize() && in PerformSELECTCombine()
24432 TargetLowering::TargetLoweringOpt TLO(DAG, DCI.isBeforeLegalize(), in PerformSELECTCombine()
24795 if (!DCI.isBeforeLegalize() && !DCI.isBeforeLegalizeOps()) { in PerformCMOVCombine()
24869 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in PerformMulCombine()
26898 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in PerformBTCombine()
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