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Searched refs:isImm (Results 1 – 25 of 128) sorted by relevance

123456

/external/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64MCCodeEmitter.cpp210 assert(MO.isImm() && "did not expect relocated expression"); in getMachineOpValue()
221 if (MO.isImm()) in getLdStUImm12OpValue()
242 if (MO.isImm()) in getAdrLabelOpValue()
273 if (MO.isImm()) in getAddSubImmOpValue()
295 if (MO.isImm()) in getCondBranchTargetOpValue()
317 if (MO.isImm()) in getLoadLiteralOpValue()
345 if (MO.isImm()) in getMoveWideImmOpValue()
365 if (MO.isImm()) in getTestBranchTargetOpValue()
387 if (MO.isImm()) in getBranchTargetOpValue()
413 assert(MO.isImm() && "Expected an immediate value for the shift amount!"); in getVecShifterOpValue()
[all …]
/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsMCCodeEmitter.cpp55 assert(Inst.getOperand(2).isImm()); in LowerLargeShift()
95 assert(InstIn.getOperand(2).isImm()); in LowerDextDins()
97 assert(InstIn.getOperand(3).isImm()); in LowerDextDins()
228 if (MO.isImm()) return MO.getImm() >> 2; in getBranchTargetOpValue()
251 if (MO.isImm()) return MO.getImm() >> 1; in getBranchTarget7OpValueMM()
273 if (MO.isImm()) return MO.getImm() >> 1; in getBranchTargetOpValueMMPC10()
295 if (MO.isImm()) return MO.getImm() >> 1; in getBranchTargetOpValueMM()
318 if (MO.isImm()) return MO.getImm() >> 2; in getBranchTarget21OpValue()
341 if (MO.isImm()) return MO.getImm() >> 2; in getBranchTarget26OpValue()
363 if (MO.isImm()) in getBranchTarget26OpValueMM()
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/external/llvm/lib/Target/ARM/MCTargetDesc/
DARMMCTargetDesc.cpp38 (MI.getOperand(0).isImm() && MI.getOperand(0).getImm() == 15) && in getMCRDeprecationInfo()
39 (MI.getOperand(1).isImm() && MI.getOperand(1).getImm() == 0) && in getMCRDeprecationInfo()
42 (MI.getOperand(3).isImm() && MI.getOperand(3).getImm() == 7)) { in getMCRDeprecationInfo()
43 if ((MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 4)) { in getMCRDeprecationInfo()
44 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 5) { in getMCRDeprecationInfo()
51 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10) { in getMCRDeprecationInfo()
58 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10 && in getMCRDeprecationInfo()
59 (MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 5)) { in getMCRDeprecationInfo()
69 if (STI.getFeatureBits()[llvm::ARM::HasV8Ops] && MI.getOperand(1).isImm() && in getITDeprecationInfo()
/external/llvm/lib/Target/PowerPC/MCTargetDesc/
DPPCMCCodeEmitter.cpp157 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getDirectBrEncoding()
169 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getCondBrEncoding()
182 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsDirectBrEncoding()
195 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsCondBrEncoding()
207 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getImm16Encoding()
224 if (MO.isImm()) in getMemRIEncoding()
243 if (MO.isImm()) in getMemRIXEncoding()
263 assert(MO.isImm()); in getSPE8DisEncoding()
279 assert(MO.isImm()); in getSPE4DisEncoding()
295 assert(MO.isImm()); in getSPE2DisEncoding()
[all …]
/external/llvm/lib/Target/X86/InstPrinter/
DX86InstComments.cpp226 if (MI->getOperand(MI->getNumOperands() - 1).isImm()) in EmitAnyX86InstComments()
242 if (MI->getOperand(MI->getNumOperands() - 1).isImm()) in EmitAnyX86InstComments()
258 if (MI->getOperand(MI->getNumOperands() - 1).isImm()) in EmitAnyX86InstComments()
272 if (MI->getOperand(MI->getNumOperands() - 1).isImm()) in EmitAnyX86InstComments()
288 if (MI->getOperand(MI->getNumOperands() - 1).isImm()) in EmitAnyX86InstComments()
340 if (MI->getOperand(MI->getNumOperands() - 1).isImm()) in EmitAnyX86InstComments()
351 if (MI->getOperand(MI->getNumOperands() - 1).isImm()) in EmitAnyX86InstComments()
367 if (MI->getOperand(MI->getNumOperands() - 1).isImm()) in EmitAnyX86InstComments()
382 if (MI->getOperand(MI->getNumOperands() - 1).isImm()) in EmitAnyX86InstComments()
397 if (MI->getOperand(MI->getNumOperands() - 1).isImm()) in EmitAnyX86InstComments()
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DX86IntelInstPrinter.cpp126 if (Op.isImm()) in printPCRelImm()
149 } else if (Op.isImm()) { in printOperand()
187 if (!DispSpec.isImm()) { in printMemReference()
244 if (DispSpec.isImm()) { in printMemOffset()
DX86ATTInstPrinter.cpp145 if (Op.isImm()) in printPCRelImm()
167 } else if (Op.isImm()) { in printOperand()
202 if (DispSpec.isImm()) { in printMemReference()
274 if (DispSpec.isImm()) { in printMemOffset()
/external/llvm/lib/Target/Sparc/MCTargetDesc/
DSparcMCCodeEmitter.cpp122 if (MO.isImm()) in getMachineOpValue()
146 if (MO.isReg() || MO.isImm()) in getCallTargetOpValue()
181 if (MO.isReg() || MO.isImm()) in getBranchTargetOpValue()
194 if (MO.isReg() || MO.isImm()) in getBranchPredTargetOpValue()
206 if (MO.isReg() || MO.isImm()) in getBranchOnRegTargetOpValue()
/external/llvm/lib/Target/BPF/InstPrinter/
DBPFInstPrinter.cpp58 } else if (Op.isImm()) { in printOperand()
71 if (OffsetOp.isImm()) in printMemOperand()
84 if (Op.isImm()) in printImm64Operand()
/external/llvm/lib/Target/Sparc/Disassembler/
DSparcDisassembler.cpp321 bool isImm = fieldFromInstruction(insn, 13, 1); in DecodeMem() local
326 if (isImm) in DecodeMem()
344 if (isImm) in DecodeMem()
454 unsigned isImm = fieldFromInstruction(insn, 13, 1); in DecodeJMPL() local
457 if (isImm) in DecodeJMPL()
473 if (isImm) in DecodeJMPL()
487 unsigned isImm = fieldFromInstruction(insn, 13, 1); in DecodeReturn() local
490 if (isImm) in DecodeReturn()
501 if (isImm) in DecodeReturn()
516 unsigned isImm = fieldFromInstruction(insn, 13, 1); in DecodeSWAP() local
[all …]
/external/llvm/lib/Target/AMDGPU/AsmParser/
DAMDGPUAsmParser.cpp125 if (isImm()) in addSoppBrTargetOperands()
143 bool isImm() const override { in isImm() function in __anon2fa8e53e0111::AMDGPUOperand
150 return isImm() && ((Imm.Val <= 64 && Imm.Val >= -16) || in isInlineImm()
156 assert(isImm()); in isDSOffset0()
161 assert(isImm()); in isDSOffset1()
170 assert(isImm()); in getImmTy()
201 return isReg() || isImm(); in isRegOrImm()
213 return isImm() || (isReg() && isRegClass(AMDGPU::SReg_32RegClassID)); in isSSrc32()
217 return isImm() || isInlineImm() || in isSSrc64()
234 return isImm() || (isReg() && isRegClass(AMDGPU::VS_32RegClassID)); in isVSrc32()
[all …]
/external/llvm/lib/Target/MSP430/InstPrinter/
DMSP430InstPrinter.cpp38 if (Op.isImm()) in printPCRelImmOperand()
52 } else if (Op.isImm()) { in printOperand()
81 assert(Disp.isImm() && "Expected immediate in displacement field"); in printSrcMemOperand()
/external/llvm/lib/Target/AMDGPU/
DSIFoldOperands.cpp63 if (FoldOp->isImm()) { in FoldCandidate()
72 bool isImm() const { in isImm() function
113 if (Fold.isImm()) { in updateOperand()
213 bool FoldingImm = OpToFold.isImm(); in foldOperand()
323 bool FoldingImm = OpToFold.isImm(); in runOnMachineFunction()
367 if (!Fold.isImm()) { in runOnMachineFunction()
/external/llvm/lib/Target/SystemZ/AsmParser/
DSystemZAsmParser.cpp214 bool isImm() const override { in isImm() function in __anon920606c00111::SystemZOperand
217 bool isImm(int64_t MinValue, int64_t MaxValue) const { in isImm() function in __anon920606c00111::SystemZOperand
333 bool isU1Imm() const { return isImm(0, 1); } in isU1Imm()
334 bool isU2Imm() const { return isImm(0, 3); } in isU2Imm()
335 bool isU3Imm() const { return isImm(0, 7); } in isU3Imm()
336 bool isU4Imm() const { return isImm(0, 15); } in isU4Imm()
337 bool isU6Imm() const { return isImm(0, 63); } in isU6Imm()
338 bool isU8Imm() const { return isImm(0, 255); } in isU8Imm()
339 bool isS8Imm() const { return isImm(-128, 127); } in isS8Imm()
340 bool isU12Imm() const { return isImm(0, 4095); } in isU12Imm()
[all …]
/external/llvm/lib/Target/Hexagon/
DHexagonHardwareLoops.cpp313 bool isImm() const { return Kind == CV_Immediate; } in isImm() function in __anonfb58bf460111::CountValue
324 assert(isImm() && "Wrong CountValue accessor"); in getImm()
330 if (isImm()) { OS << Contents.ImmVal; } in print()
643 if (Op2.isImm() || Op1.getReg() == IVReg) in getLoopTripCount()
709 if (!Start->isReg() && !Start->isImm()) in computeCount()
711 if (!End->isReg() && !End->isImm()) in computeCount()
737 if (Start->isImm() && End->isImm()) { in computeCount()
809 bool RegToImm = Start->isReg() && End->isImm(); // for (reg..imm) in computeCount()
813 if (Start->isImm()) in computeCount()
815 if (End->isImm()) in computeCount()
[all …]
DHexagonInstrInfo.cpp243 MI->getOperand(1).isImm() && (MI->getOperand(1).getImm() == 0)) { in isLoadFromStackSlot()
267 MI->getOperand(1).isImm() && (MI->getOperand(1).getImm() == 0)) { in isStoreToStackSlot()
491 if (!Cond.empty() && Cond[0].isImm()) in InsertBranch()
535 } else if(Cond[2].isImm()) { in InsertBranch()
1011 assert(Cond[0].isImm() && "First entry in the cond vector not imm-val"); in ReverseBranchCondition()
1687 assert(MO.isImm() && "Extendable operand must be Immediate type"); in isConstExtended()
2738 assert (MI->getOperand(0).isReg() && MI->getOperand(1).isImm() && in getBaseAndOffsetPosition()
2760 if (!MI->getOperand(BasePos).isReg() || !MI->getOperand(OffsetPos).isImm()) in getBaseAndOffsetPosition()
2869 isIntRegForSubInst(SrcReg) && MI->getOperand(2).isImm() && in getCompoundCandidateGroup()
2894 MI->getOperand(2).isImm() && in getCompoundCandidateGroup()
[all …]
/external/llvm/lib/Target/Sparc/InstPrinter/
DSparcInstPrinter.cpp67 if (MI->getOperand(2).isImm() && in printSparcAliasInstr()
117 if (MO.isImm()) { in printOperand()
141 if (MO.isImm() && MO.getImm() == 0) in printMemOperand()
/external/llvm/include/llvm/MC/
DMCInst.h57 bool isImm() const { return Kind == kImmediate; } in isImm() function
75 assert(isImm() && "This is not an immediate"); in getImm()
79 assert(isImm() && "This is not an immediate"); in setImm()
/external/llvm/lib/Target/X86/AsmParser/
DX86Operand.h134 bool isImm() const override { return Kind == Immediate; } in isImm() function
137 if (!isImm()) in isImmSExti16i8()
151 if (!isImm()) in isImmSExti32i8()
165 if (!isImm()) in isImmSExti64i8()
179 if (!isImm()) in isImmSExti64i32()
194 if (!isImm()) return false; in isImmUnsignedi8()
283 return isImm(); in isAVX512RC()
/external/llvm/lib/Target/BPF/MCTargetDesc/
DBPFMCCodeEmitter.cpp81 if (MO.isImm()) in getMachineOpValue()
128 uint64_t Imm = MO.isImm() ? MO.getImm() : 0; in encodeInstruction()
162 assert(Op2.isImm() && "Second operand is not immediate."); in getMemoryOpValue()
/external/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp437 bool isImm() const override { return Kind == k_Immediate; } in isImm() function in __anon26fd99540211::AArch64Operand
440 if (!isImm()) in isSImm9()
449 if (!isImm()) in isSImm7s4()
458 if (!isImm()) in isSImm7s8()
467 if (!isImm()) in isSImm7s16()
510 if (!isImm()) in isUImm12Offset()
522 if (!isImm()) in isImm0_1()
531 if (!isImm()) in isImm0_7()
540 if (!isImm()) in isImm1_8()
549 if (!isImm()) in isImm0_15()
[all …]
/external/llvm/lib/Target/PowerPC/InstPrinter/
DPPCInstPrinter.cpp318 if (MI->getOperand(OpNo).isImm()) in printS16ImmOperand()
326 if (MI->getOperand(OpNo).isImm()) in printU16ImmOperand()
334 if (!MI->getOperand(OpNo).isImm()) in printBranchOperand()
345 if (!MI->getOperand(OpNo).isImm()) in printAbsBranchOperand()
442 if (Op.isImm()) { in printOperand()
/external/llvm/lib/Target/PowerPC/
DPPCBranchSelector.cpp143 if (I->getOpcode() == PPC::BCC && !I->getOperand(2).isImm()) in runOnMachineFunction()
146 !I->getOperand(1).isImm()) in runOnMachineFunction()
150 !I->getOperand(0).isImm()) in runOnMachineFunction()
/external/llvm/lib/Target/AMDGPU/MCTargetDesc/
DSIMCCodeEmitter.cpp170 if (!MO.isImm()) in getLitEncoding()
214 if (Op.isImm()) in encodeInstruction()
272 } else if (MO.isImm()) in getMachineOpValue()
/external/llvm/utils/TableGen/
DFastISelEmitter.cpp98 bool isImm() const { return Repr >= OK_Imm; } in isImm() function in __anone694a1120311::OperandsSignature::OpKind
100 unsigned getImmCode() const { assert(isImm()); return Repr-OK_Imm; } in getImmCode()
131 if (Operands[i].isImm() && Operands[i].getImmCode() != 0) in hasAnyImmediateCodes()
141 if (!Operands[i].isImm()) in getWithoutImmCodes()
151 if (!Operands[i].isImm()) continue; in emitImmediatePredicate()
289 } else if (Operands[i].isImm()) { in PrintParameters()
315 } else if (Operands[i].isImm()) { in PrintArguments()
331 } else if (Operands[i].isImm()) { in PrintArguments()

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