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Searched refs:isSignedIntSetCC (Results 1 – 8 of 8) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h874 inline bool isSignedIntSetCC(CondCode Code) { in isSignedIntSetCC() function
/external/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp1396 !ISD::isSignedIntSetCC(Cond) && in SimplifySetCC()
1622 if (ISD::isSignedIntSetCC(Cond)) { in SimplifySetCC()
DLegalizeDAG.cpp4374 ExtOp = isSignedIntSetCC(CCCode) ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in PromoteNode()
4387 ExtOp = isSignedIntSetCC(CCCode) ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in PromoteNode()
DDAGCombiner.cpp5799 if (ExtOpc == ISD::ZERO_EXTEND && ISD::isSignedIntSetCC(CC)) in ExtendUsesToFormExtLoad()
/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp1228 assert(ISD::isSignedIntSetCC(CC) || ISD::isUnsignedIntSetCC(CC)); in LowerSETCC()
1229 unsigned ExtOpc = ISD::isSignedIntSetCC(CC) ? ISD::SIGN_EXTEND in LowerSETCC()
/external/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp4067 const bool IsSigned = ISD::isSignedIntSetCC(CC); in PerformSELECTCombine()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp9475 if (ISD::isSignedIntSetCC(CC)) { in DAGCombineTruncBoolExt()
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp27230 (CC == ISD::SETNE || CC == ISD::SETEQ || ISD::isSignedIntSetCC(CC))) { in PerformISDSETCCCombine()