/external/llvm/test/CodeGen/AArch64/ |
D | arm64-atomic-128.ll | 24 ; CHECK: ldxp [[DEST_REGLO:x[0-9]+]], [[DEST_REGHI:x[0-9]+]], [x0] 180 ; CHECK: ldxp [[LO:x[0-9]+]], [[HI:x[0-9]+]], [x2] 205 ; CHECK: ldxp xzr, xzr, [x2] 217 ; CHECK: ldxp xzr, xzr, [x2]
|
D | arm64-ldxr-stxr.ll | 7 ; CHECK: ldxp {{x[0-9]+}}, {{x[0-9]+}}, [x0] 9 %ldrexd = tail call %0 @llvm.aarch64.ldxp(i8* %p) 30 declare %0 @llvm.aarch64.ldxp(i8*) nounwind
|
/external/llvm/test/MC/Disassembler/AArch64/ |
D | basic-a64-unpredictable.txt | 8 #ldxp x14, x14, [sp]
|
D | arm64-memory.txt | 446 # CHECK: ldxp w7, w3, [x9] 447 # CHECK: ldxp x7, x3, [x9]
|
D | basic-a64-instructions.txt | 1947 #CHECK: ldxp w0, wzr, [sp] 1948 #CHECK: ldxp x17, x0, [x18] 1949 #CHECK: ldxp x17, x0, [x18]
|
/external/llvm/test/MC/AArch64/ |
D | arm64-memory.s | 460 ldxp w7, w3, [x9] 461 ldxp x7, x3, [x9] 465 ; CHECK: ldxp w7, w3, [x9] ; encoding: [0x27,0x0d,0x7f,0x88] 466 ; CHECK: ldxp x7, x3, [x9] ; encoding: [0x27,0x0d,0x7f,0xc8]
|
D | basic-a64-instructions.s | 2280 ldxp w12, wzr, [sp] 2281 ldxp x13, x14, [x15]
|
/external/vixl/ |
D | README.md | 117 `stxrb`, `stxrh`, `stxr`, `ldxrb`, `ldxrh`, `ldxr`, `stxp`, `ldxp`, `stlxrb`,
|
/external/vixl/test/ |
D | test-disasm-a64.cc | 1772 COMPARE(ldxp(w0, w1, MemOperand(x2)), "ldxp w0, w1, [x2]"); in TEST() 1773 COMPARE(ldxp(w3, w4, MemOperand(sp)), "ldxp w3, w4, [sp]"); in TEST() 1774 COMPARE(ldxp(x5, x6, MemOperand(x7)), "ldxp x5, x6, [x7]"); in TEST() 1775 COMPARE(ldxp(x8, x9, MemOperand(sp)), "ldxp x8, x9, [sp]"); in TEST()
|
/external/vixl/src/vixl/a64/ |
D | macro-assembler-a64.h | 1545 ldxp(rt, rt2, src); in Ldxp()
|
D | assembler-a64.h | 1867 void ldxp(const Register& rt, const Register& rt2, const MemOperand& src);
|
D | assembler-a64.cc | 1765 void Assembler::ldxp(const Register& rt, in ldxp() function in vixl::Assembler
|
/external/vixl/doc/ |
D | supported-instructions.md | 722 void ldxp(const Register& rt, const Register& rt2, const MemOperand& src)
|
/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 2408 def LDXPW : LoadExclusivePair<0b10, 0, 1, 1, 0, GPR32, "ldxp">; 2409 def LDXPX : LoadExclusivePair<0b11, 0, 1, 1, 0, GPR64, "ldxp">;
|