Searched refs:lowered (Results 1 – 25 of 86) sorted by relevance
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4 ; loop block. This intrinsic will be lowered to s_or_b64 by the code9 ; This is was lowered from the llvm.SI.end.cf intrinsic:
3 ; This tests for a bug in the SelectionDAG where custom lowered truncated
3 ;Test that a select with reversed True/False values is correctly lowered
17 ; This test checks that a setcc node with f32 operands is lowered to a
5 ; 64-bit select was originally lowered with a build_pair, and this
138 bool lowered = (addr & 4) != 0; in pid_memory_read() local139 if (lowered) in pid_memory_read()148 if (! lowered) in pid_memory_read()151 if (lowered) in pid_memory_read()
6 ; CHECK: LLVM ERROR: MachO doesn't support COMDATs, 'f' cannot be lowered.
3 ; are lowered correctly to an indirect call via a scratch register.
4 ; On i386, i64 cmpxchg is lowered during legalize types to extract the
3 ; Inserts and extracts with variable indices must be lowered
1 ; Check that eh_return & unwind_init were properly lowered
7 ; Check that lowered arguments on the stack do not overwrite each other.
9 ; This is custom lowered into the following sequence:
33 ; When using fast isel, sdiv is lowered into a sequence of CQO + DIV64.
16 ; DBGDAG-LABEL: Optimized lowered selection DAG: BB#0 'merge_store_partial_overlap_load:'
2 ; Check that lowered argumens do not overwrite the return address before it is moved.
634 ir_loop_jump* lowered = 0; in visit() local635 lowered = new(ir) ir_loop_jump(ir_loop_jump::jump_break); in visit()641 jumps[lower]->replace_with(lowered); in visit()642 jumps[lower] = lowered; in visit()
5 ; branch, then further lowered to cmplwi + brcc but without the fidelity that
5 ; branch, then further lowered to CMPri + brcc but without the fidelity that
3 ; The switch is lowered with a single icmp.
4 ; Test that LLVM unreachable instruction and trap intrinsic are lowered to
3 ; Test that phis are lowered.
24 /// For example, this is true for i32's that were lowered from soft-float.184 // legal and is lowered to i128 which is further lowered to a pair of i64's.365 // f128 is not legal and is lowered to i128 which is further lowered to a pair
9 ;; Reverse shuffles should be lowered to vrev and possibly a vext (for