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/external/llvm/test/CodeGen/X86/
Dslow-unaligned-mem.ll3 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=pentium3 2>&1 | FileCheck %s --check-prefi…
4 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=pentium3m 2>&1 | FileCheck %s --check-prefi…
5 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=pentium-m 2>&1 | FileCheck %s --check-prefi…
6 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=pentium4 2>&1 | FileCheck %s --check-prefi…
7 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=pentium4m 2>&1 | FileCheck %s --check-prefi…
8 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=yonah 2>&1 | FileCheck %s --check-prefi…
9 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=prescott 2>&1 | FileCheck %s --check-prefi…
10 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=nocona 2>&1 | FileCheck %s --check-prefi…
11 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=core2 2>&1 | FileCheck %s --check-prefi…
12 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=penryn 2>&1 | FileCheck %s --check-prefi…
[all …]
Dx86-64-double-shifts-var.ll1 ; RUN: llc < %s -march=x86-64 -mcpu=athlon | FileCheck %s
2 ; RUN: llc < %s -march=x86-64 -mcpu=athlon-tbird | FileCheck %s
3 ; RUN: llc < %s -march=x86-64 -mcpu=athlon-4 | FileCheck %s
4 ; RUN: llc < %s -march=x86-64 -mcpu=athlon-xp | FileCheck %s
5 ; RUN: llc < %s -march=x86-64 -mcpu=athlon-mp | FileCheck %s
6 ; RUN: llc < %s -march=x86-64 -mcpu=k8 | FileCheck %s
7 ; RUN: llc < %s -march=x86-64 -mcpu=opteron | FileCheck %s
8 ; RUN: llc < %s -march=x86-64 -mcpu=athlon64 | FileCheck %s
9 ; RUN: llc < %s -march=x86-64 -mcpu=athlon-fx | FileCheck %s
10 ; RUN: llc < %s -march=x86-64 -mcpu=k8-sse3 | FileCheck %s
[all …]
Dcpus.ll5 ; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=foobar 2>&1 | FileCheck %s --che…
10 ; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=nocona 2>&1 | FileCheck %s --che…
11 ; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core2 2>&1 | FileCheck %s --chec…
12 ; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=penryn 2>&1 | FileCheck %s --che…
13 ; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=nehalem 2>&1 | FileCheck %s --ch…
14 ; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=westmere 2>&1 | FileCheck %s --c…
15 ; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=sandybridge 2>&1 | FileCheck %s …
16 ; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=ivybridge 2>&1 | FileCheck %s --…
17 ; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=haswell 2>&1 | FileCheck %s --ch…
18 ; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=broadwell 2>&1 | FileCheck %s --…
[all …]
/external/clang/test/Driver/
Dr600-mcpu.cl1 t// Check that -mcpu works for all supported GPUs
3 // RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=r600 %s -o - 2>&1 | FileCheck --check-pr…
4 // RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=rv630 %s -o - 2>&1 | FileCheck --check-p…
5 // RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=rv635 %s -o - 2>&1 | FileCheck --check-p…
6 // RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=rv610 %s -o - 2>&1 | FileCheck --check-p…
7 // RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=rv620 %s -o - 2>&1 | FileCheck --check-p…
8 // RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=rs780 %s -o - 2>&1 | FileCheck --check-p…
9 // RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=rs880 %s -o - 2>&1 | FileCheck --check-p…
10 // RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=rv670 %s -o - 2>&1 | FileCheck --check-p…
11 // RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=rv710 %s -o - 2>&1 | FileCheck --check-p…
[all …]
/external/llvm/test/MC/X86/
Dx86_nop.s1 # RUN: llvm-mc -filetype=obj -triple=i686-pc-linux -mcpu=generic %s | llvm-objdump -d - | FileCheck…
2 # RUN: llvm-mc -filetype=obj -triple=i686-pc-linux -mcpu=i386 %s | llvm-objdump -d - | FileCheck %s
3 # RUN: llvm-mc -filetype=obj -triple=i686-pc-linux -mcpu=i486 %s | llvm-objdump -d - | FileCheck %s
4 # RUN: llvm-mc -filetype=obj -triple=i686-pc-linux -mcpu=i586 %s | llvm-objdump -d - | FileCheck %s
5 # RUN: llvm-mc -filetype=obj -triple=i686-pc-linux -mcpu=pentium %s | llvm-objdump -d - | FileCheck…
6 # RUN: llvm-mc -filetype=obj -triple=i686-pc-linux -mcpu=pentium-mmx %s | llvm-objdump -d - | FileC…
7 # RUN: llvm-mc -filetype=obj -triple=i686-pc-linux -mcpu=geode %s | llvm-objdump -d - | FileCheck %s
8 # RUN: llvm-mc -filetype=obj -triple=i686-pc-linux -mcpu=i686 %s | llvm-objdump -d - | FileCheck %s
9 # RUN: llvm-mc -filetype=obj -triple=i686-pc-linux -mcpu=k6 %s | llvm-objdump -d - | FileCheck %s
10 # RUN: llvm-mc -filetype=obj -triple=i686-pc-linux -mcpu=k6-2 %s | llvm-objdump -d - | FileCheck %s
[all …]
/external/llvm/test/MC/Mips/
Delf_eflags.s2 # corresponding options (-mcpu=mips32 -> -mips32 for example).
4 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r6 %s -o -| llvm-readobj -h |…
7 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r6 -mattr=+nan2008 %s -o -| l…
10 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r2 %s -o -| llvm-readobj -h |…
11 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r3 %s -o -| llvm-readobj -h |…
12 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r5 %s -o -| llvm-readobj -h |…
15 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r2 -mattr=+nan2008 %s -o -| l…
16 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r3 -mattr=+nan2008 %s -o -| l…
17 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r5 -mattr=+nan2008 %s -o -| l…
20 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64 %s -o -| llvm-readobj -h | F…
[all …]
/external/llvm/test/CodeGen/Mips/
Dcheck-adde-redundant-moves.ll1 ; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \
3 ; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \
5 ; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \
7 ; RUN: llc < %s -march=mips -mcpu=mips32r3 | FileCheck %s \
9 ; RUN: llc < %s -march=mips -mcpu=mips32r5 | FileCheck %s \
11 ; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \
13 ; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s -check-prefix=ALL
14 ; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s -check-prefix=ALL
15 ; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s -check-prefix=ALL
16 ; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s -check-prefix=ALL
[all …]
Delf_eflags.ll19 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32 -relocation-model=static %s -o - | FileCheck …
20 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32 %s -o - | FileCheck -check-prefix=CHECK-LE32_…
21 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -relocation-model=static %s -o - | FileChec…
22 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 %s -o - | FileCheck -check-prefix=CHECK-LE3…
23 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips -relocation-model=static …
24 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips %s -o - | FileCheck -chec…
26 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips4 -relocation-model=static %s -o - | FileCheck -…
27 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips4 %s -o - | FileCheck -check-prefix=CHECK-LE64_P…
29 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64 -relocation-model=static %s -o - | FileCheck …
30 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64 %s -o - | FileCheck -check-prefix=CHECK-LE64_…
[all …]
/external/llvm/test/CodeGen/AMDGPU/
Ddefault-fp-mode.ll1 ; RUN: llc -march=amdgcn -mcpu=SI -mattr=-fp32-denormals,+fp64-denormals < %s | FileCheck -check-pr…
2 ; RUN: llc -march=amdgcn -mcpu=SI -mattr=+fp32-denormals,-fp64-denormals < %s | FileCheck -check-pr…
3 ; RUN: llc -march=amdgcn -mcpu=SI -mattr=+fp32-denormals,+fp64-denormals < %s | FileCheck -check-pr…
4 ; RUN: llc -march=amdgcn -mcpu=SI -mattr=-fp32-denormals,-fp64-denormals < %s | FileCheck -check-pr…
5 ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=DEFAULT -check-prefix=FUNC %s
6 ; RUN: llc -march=amdgcn -mcpu=SI -mattr=-fp32-denormals < %s | FileCheck -check-prefix=DEFAULT -ch…
7 ; RUN: llc -march=amdgcn -mcpu=SI -mattr=+fp64-denormals < %s | FileCheck -check-prefix=DEFAULT -ch…
8 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-fp32-denormals,+fp64-denormals < %s | FileCheck -check…
9 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+fp32-denormals,-fp64-denormals < %s | FileCheck -check…
10 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+fp32-denormals,+fp64-denormals < %s | FileCheck -check…
[all …]
/external/valgrind/none/tests/arm/
DMakefile.am47 v6intARM_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 -marm
48 v6intThumb_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 -mthumb
50 v6media_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 -mthumb
52 vfp_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 \
57 neon128_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 \
61 neon64_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 \
65 intdiv_CFLAGS = $(AM_CFLAGS) -g -mcpu=cortex-a15 -mthumb
66 ldrt_CFLAGS = $(AM_CFLAGS) -g -mcpu=cortex-a8 -mthumb
67 ldrt_arm_CFLAGS = $(AM_CFLAGS) -g -mcpu=cortex-a8 -marm
69 vfpv4_fma_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a15 -mfpu=vfpv4 -marm
/external/llvm/test/CodeGen/Mips/Fast-ISel/
Dcheck-disabled-mcpus.ll1 ; RUN: llc -march=mips -mcpu=mips2 -O0 -relocation-model=pic \
3 ; RUN: llc -march=mips -mcpu=mips3 -O0 -relocation-model=pic \
5 ; RUN: llc -march=mips -mcpu=mips4 -O0 -relocation-model=pic \
8 ; RUN: llc -march=mips -mcpu=mips32r6 -O0 -relocation-model=pic \
11 ; RUN: llc -march=mips -mcpu=mips64 -O0 -relocation-model=pic \
13 ; RUN: llc -march=mips -mcpu=mips64r2 -O0 -relocation-model=pic \
15 ; RUN: llc -march=mips -mcpu=mips64r3 -O0 -relocation-model=pic \
17 ; RUN: llc -march=mips -mcpu=mips64r5 -O0 -relocation-model=pic \
19 ; RUN: llc -march=mips -mcpu=mips32r6 -O0 -relocation-model=pic \
/external/llvm/test/CodeGen/WebAssembly/
Dcpus.ll3 ; RUN: llc < %s -mtriple=wasm32-unknown-unknown -mcpu=mvp 2>&1 | FileCheck %s
4 ; RUN: llc < %s -mtriple=wasm64-unknown-unknown -mcpu=mvp 2>&1 | FileCheck %s
5 ; RUN: llc < %s -mtriple=wasm32-unknown-unknown -mcpu=generic 2>&1 | FileCheck %s
6 ; RUN: llc < %s -mtriple=wasm64-unknown-unknown -mcpu=generic 2>&1 | FileCheck %s
7 ; RUN: llc < %s -mtriple=wasm32-unknown-unknown -mcpu=bleeding-edge 2>&1 | FileCheck %s
8 ; RUN: llc < %s -mtriple=wasm64-unknown-unknown -mcpu=bleeding-edge 2>&1 | FileCheck %s
9 ; RUN: llc < %s -mtriple=wasm32-unknown-unknown -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix…
10 ; RUN: llc < %s -mtriple=wasm64-unknown-unknown -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix…
/external/llvm/test/CodeGen/Mips/llvm-ir/
Dor.ll1 ; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \
3 ; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \
5 ; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \
7 ; RUN: llc < %s -march=mips -mcpu=mips32r3 | FileCheck %s \
9 ; RUN: llc < %s -march=mips -mcpu=mips32r5 | FileCheck %s \
11 ; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \
13 ; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \
15 ; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \
17 ; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \
19 ; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \
[all …]
Dxor.ll1 ; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \
3 ; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \
5 ; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \
7 ; RUN: llc < %s -march=mips -mcpu=mips32r3 | FileCheck %s \
9 ; RUN: llc < %s -march=mips -mcpu=mips32r5 | FileCheck %s \
11 ; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \
13 ; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \
15 ; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \
17 ; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \
19 ; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \
[all …]
Dand.ll1 ; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \
3 ; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \
5 ; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \
7 ; RUN: llc < %s -march=mips -mcpu=mips32r3 | FileCheck %s \
9 ; RUN: llc < %s -march=mips -mcpu=mips32r5 | FileCheck %s \
11 ; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \
13 ; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \
15 ; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \
17 ; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \
19 ; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \
[all …]
Dindirectbr.ll3 ; RUN: llc -march=mips -mcpu=mips32 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check…
4 ; RUN: llc -march=mips -mcpu=mips32r2 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check…
5 ; RUN: llc -march=mips -mcpu=mips32r3 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check…
6 ; RUN: llc -march=mips -mcpu=mips32r5 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check…
7 ; RUN: llc -march=mips -mcpu=mips32r6 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check…
8 ; RUN: llc -march=mips64 -mcpu=mips4 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check…
9 ; RUN: llc -march=mips64 -mcpu=mips64 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check…
10 ; RUN: llc -march=mips64 -mcpu=mips64r2 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check…
11 ; RUN: llc -march=mips64 -mcpu=mips64r3 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check…
12 ; RUN: llc -march=mips64 -mcpu=mips64r5 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check…
[all …]
Dudiv.ll1 ; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \
3 ; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \
5 ; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \
7 ; RUN: llc < %s -march=mips -mcpu=mips32r3 | FileCheck %s \
9 ; RUN: llc < %s -march=mips -mcpu=mips32r5 | FileCheck %s \
11 ; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \
13 ; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \
15 ; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \
17 ; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \
19 ; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \
[all …]
Dadd.ll1 ; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \
3 ; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \
5 ; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \
7 ; RUN: llc < %s -march=mips -mcpu=mips32r3 | FileCheck %s \
9 ; RUN: llc < %s -march=mips -mcpu=mips32r5 | FileCheck %s \
11 ; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \
13 ; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \
15 ; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \
17 ; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \
19 ; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \
[all …]
Dsub.ll1 ; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \
3 ; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \
5 ; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \
7 ; RUN: llc < %s -march=mips -mcpu=mips32r3 | FileCheck %s \
9 ; RUN: llc < %s -march=mips -mcpu=mips32r5 | FileCheck %s \
11 ; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \
13 ; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \
15 ; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \
17 ; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \
19 ; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \
[all …]
/external/llvm/test/CodeGen/ARM/
Dneon-spfp.ll1 ; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a5 | FileCheck %s -check-prefix=C…
2 ; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a8 | FileCheck %s -check-prefix=C…
3 ; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a9 | FileCheck %s -check-prefix=C…
4 ; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a15 | FileCheck %s -check-prefix=…
5 ; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=swift | FileCheck %s -check-prefix=CHECK…
7 ; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a5 --enable-unsafe-fp-math | File…
8 ; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a8 --enable-unsafe-fp-math | File…
9 ; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a9 --enable-unsafe-fp-math | File…
10 ; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a15 --enable-unsafe-fp-math | Fil…
11 ; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=swift --enable-unsafe-fp-math | FileChec…
[all …]
Dkrait-cpu-div-attribute.ll6 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=krait | FileCheck %s --check-prefix=DIV_EXTENSION
7 ; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -mcpu=krait | FileCheck %s --check-prefix=DIV_EXTENS…
8 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 | FileCheck %s --check-prefix=NODIV_KR…
9 ; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -mcpu=cortex-a9 | FileCheck %s --check-prefix=NODIV_…
10 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=krait -mattr=-hwdiv,-hwdiv-arm | FileCheck %s --…
13 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=krait -filetype=obj | llvm-objdump -mcpu=krait -…
14 ; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -mcpu=krait -filetype=obj | llvm-objdump -mcpu=krait…
/external/llvm/test/MC/Mips/eva/
Dinvalid-noeva.s3 # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips32r2 2>%t1
5 # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips32r3 2>%t1
7 # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips32r5 2>%t1
9 # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips32r6 2>%t1
11 # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r2 2>%t1
13 # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r3 2>%t1
15 # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r5 2>%t1
17 # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r6 2>%t1
/external/llvm/test/CodeGen/PowerPC/
Dcode-align.ll1 ; RUN: llc -mcpu=ppc64 < %s | FileCheck %s -check-prefix=GENERIC
2 ; RUN: llc -mcpu=970 < %s | FileCheck %s -check-prefix=PWR
3 ; RUN: llc -mcpu=a2 < %s | FileCheck %s -check-prefix=BASIC
4 ; RUN: llc -mcpu=e500mc < %s | FileCheck %s -check-prefix=BASIC
5 ; RUN: llc -mcpu=e5500 < %s | FileCheck %s -check-prefix=BASIC
6 ; RUN: llc -mcpu=pwr4 < %s | FileCheck %s -check-prefix=PWR
7 ; RUN: llc -mcpu=pwr5 < %s | FileCheck %s -check-prefix=PWR
8 ; RUN: llc -mcpu=pwr5x < %s | FileCheck %s -check-prefix=PWR
9 ; RUN: llc -mcpu=pwr6 < %s | FileCheck %s -check-prefix=PWR
10 ; RUN: llc -mcpu=pwr6x < %s | FileCheck %s -check-prefix=PWR
[all …]
/external/llvm/test/CodeGen/AArch64/
Dcpus.ll4 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=generic 2>&1 | FileCheck %s
5 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a35 2>&1 | FileCheck %s
6 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a53 2>&1 | FileCheck %s
7 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a57 2>&1 | FileCheck %s
8 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a72 2>&1 | FileCheck %s
9 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=…
/external/llvm/test/CodeGen/SPARC/
Dctpop.ll3 ; RUN: llc < %s -march=sparc -mcpu=v9 | FileCheck %s -check-prefix=V8
4 ; RUN: llc < %s -march=sparc -mcpu=ultrasparc | FileCheck %s -check-prefix=V8
5 ; RUN: llc < %s -march=sparc -mcpu=ultrasparc3 | FileCheck %s -check-prefix=V8
6 ; RUN: llc < %s -march=sparc -mcpu=niagara | FileCheck %s -check-prefix=V8
7 ; RUN: llc < %s -march=sparc -mcpu=niagara2 | FileCheck %s -check-prefix=V9
8 ; RUN: llc < %s -march=sparc -mcpu=niagara3 | FileCheck %s -check-prefix=V9
9 ; RUN: llc < %s -march=sparc -mcpu=niagara4 | FileCheck %s -check-prefix=V9

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