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Searched refs:phl (Results 1 – 21 of 21) sorted by relevance

/external/curl/tests/libtest/
Dlib1526.c50 struct curl_slist *hhl = NULL, *phl = NULL, *tmp = NULL; in test() local
64 phl = curl_slist_append(phl, "User-Agent: Proxy Agent"); in test()
65 if (!hhl || !phl) { in test()
68 tmp = curl_slist_append(phl, "Expect:"); in test()
72 phl = tmp; in test()
77 test_setopt(curl, CURLOPT_PROXYHEADER, phl); in test()
97 curl_slist_free_all(phl); in test()
Dlib1528.c33 struct curl_slist *phl = NULL; in test() local
47 phl = curl_slist_append(phl, "Proxy-User-Agent: Http Agent2"); in test()
56 test_setopt(curl, CURLOPT_PROXYHEADER, phl); in test()
68 curl_slist_free_all(phl); in test()
/external/llvm/test/MC/Mips/micromips-dsp/
Dvalid.s39 preceq.w.phl $1, $2 # CHECK: preceq.w.phl $1, $2 # encoding: [0x00,0x22,0x51,0x3c]
80 muleq_s.w.phl $1, $2, $3 # CHECK: muleq_s.w.phl $1, $2, $3 # encoding: [0x00,0x62,0x08,0x25]
88 …maq_s.w.phl $ac1, $2, $3 # CHECK: maq_s.w.phl $ac1, $2, $3 # encoding: [0x00,0x62,0x5a,0x7…
89 …maq_sa.w.phl $ac1, $2, $3 # CHECK: maq_sa.w.phl $ac1, $2, $3 # encoding: [0x00,0x62,0x7a,0x7…
/external/llvm/test/MC/Mips/dsp/
Dvalid.s53 …maq_s.w.phl $ac2, $3, $4 # CHECK: maq_s.w.phl $ac2, $3, $4 # encoding: [0x7c,0x…
54 …maq_sa.w.phl $ac3, $5, $6 # CHECK: maq_sa.w.phl $ac3, $5, $6 # encoding: [0x7c,0x…
71 …muleq_s.w.phl $21, $22, $23 # CHECK: muleq_s.w.phl $21, $22, $23 # encoding: [0x7e,0x…
84 …preceq.w.phl $20, $21 # CHECK: preceq.w.phl $20, $21 # encoding: [0x7c,0x…
/external/llvm/test/MC/Mips/dspr2/
Dvalid.s75 …maq_s.w.phl $ac2, $3, $4 # CHECK: maq_s.w.phl $ac2, $3, $4 # encoding: [0x7c,0x64,0…
76 …maq_sa.w.phl $ac3, $5, $6 # CHECK: maq_sa.w.phl $ac3, $5, $6 # encoding: [0x7c,0xa6,0…
95 …muleq_s.w.phl $21, $22, $23 # CHECK: muleq_s.w.phl $21, $22, $23 # encoding: [0x7e,0xd7,0…
112 …preceq.w.phl $20,$21 # CHECK: preceq.w.phl $20, $21 # encoding: [0x7c,0x15,0…
/external/llvm/test/MC/Disassembler/Mips/micromips-dsp/
Dvalid.txt38 0x00 0x22 0x51 0x3c # CHECK: preceq.w.phl $1, $2
79 0x00 0x62 0x08 0x25 # CHECK: muleq_s.w.phl $1, $2, $3
87 0x00 0x62 0x5a 0x7c # CHECK: maq_s.w.phl $ac1, $2, $3
88 0x00 0x62 0x7a 0x7c # CHECK: maq_sa.w.phl $ac1, $2, $3
/external/llvm/test/MC/Mips/micromips-dspr2/
Dvalid.s52 preceq.w.phl $1, $2 # CHECK: preceq.w.phl $1, $2 # encoding: [0x00,0x22,0x51,0x3c]
119 muleq_s.w.phl $1, $2, $3 # CHECK: muleq_s.w.phl $1, $2, $3 # encoding: [0x00,0x62,0x08,0x25]
/external/llvm/test/MC/Disassembler/Mips/dsp/
Dvalid.txt51 0x7c 0x64 0x15 0x30 # CHECK: maq_s.w.phl $ac2, $3, $4
52 0x7c 0xa6 0x1c 0x30 # CHECK: maq_sa.w.phl $ac3, $5, $6
69 0x7e 0xd7 0xaf 0x10 # CHECK: muleq_s.w.phl $21, $22, $23
82 0x7c 0x15 0xa3 0x12 # CHECK: preceq.w.phl $20, $21
/external/valgrind/none/tests/mips32/
Dmips32_dsp.stdout.exp-BE2091 maq_s.w.phl $ac3, $t4, $t5 :: rs 0x00000000 rt 0x00000000 inHI 0xffffffff inLO 0x80000000 outHI 0xf…
2092 maq_s.w.phl $ac0, $t0, $t1 :: rs 0x00000004 rt 0x40000000 inHI 0x00000000 inLO 0x00000006 outHI 0x0…
2093 maq_s.w.phl $ac1, $t2, $t3 :: rs 0x80002435 rt 0x80003421 inHI 0x00000000 inLO 0x40000000 outHI 0x0…
2094 maq_s.w.phl $ac3, $t6, $t7 :: rs 0x76548000 rt 0x73468000 inHI 0x00000000 inLO 0x7fffffff outHI 0x0…
2095 maq_s.w.phl $ac0, $t5, $t3 :: rs 0x80000000 rt 0x80000000 inHI 0x00000000 inLO 0x00000001 outHI 0x0…
2096 maq_s.w.phl $ac1, $t2, $t4 :: rs 0x00010001 rt 0xffffffff inHI 0xffffffff inLO 0xffffffff outHI 0xf…
2097 maq_s.w.phl $ac2, $t0, $t8 :: rs 0x7fff7fff rt 0x7fff7fff inHI 0xffffffff inLO 0xffffffff outHI 0x0…
2098 maq_s.w.phl $ac0, $t0, $t1 :: rs 0x0000c420 rt 0x00000555 inHI 0x00000000 inLO 0x0fde3126 outHI 0x0…
2099 maq_s.w.phl $ac1, $t2, $t3 :: rs 0x00000000 rt 0x00000000 inHI 0x00000000 inLO 0x55555555 outHI 0x0…
2100 maq_s.w.phl $ac2, $t4, $t1 :: rs 0x80000000 rt 0x80000000 inHI 0xffffffff inLO 0xffff2435 outHI 0x0…
[all …]
Dmips32_dsp.stdout.exp-LE2091 maq_s.w.phl $ac3, $t4, $t5 :: rs 0x00000000 rt 0x00000000 inHI 0xffffffff inLO 0x80000000 outHI 0xf…
2092 maq_s.w.phl $ac0, $t0, $t1 :: rs 0x00000004 rt 0x40000000 inHI 0x00000000 inLO 0x00000006 outHI 0x0…
2093 maq_s.w.phl $ac1, $t2, $t3 :: rs 0x80002435 rt 0x80003421 inHI 0x00000000 inLO 0x40000000 outHI 0x0…
2094 maq_s.w.phl $ac3, $t6, $t7 :: rs 0x76548000 rt 0x73468000 inHI 0x00000000 inLO 0x7fffffff outHI 0x0…
2095 maq_s.w.phl $ac0, $t5, $t3 :: rs 0x80000000 rt 0x80000000 inHI 0x00000000 inLO 0x00000001 outHI 0x0…
2096 maq_s.w.phl $ac1, $t2, $t4 :: rs 0x00010001 rt 0xffffffff inHI 0xffffffff inLO 0xffffffff outHI 0xf…
2097 maq_s.w.phl $ac2, $t0, $t8 :: rs 0x7fff7fff rt 0x7fff7fff inHI 0xffffffff inLO 0xffffffff outHI 0x0…
2098 maq_s.w.phl $ac0, $t0, $t1 :: rs 0x0000c420 rt 0x00000555 inHI 0x00000000 inLO 0x0fde3126 outHI 0x0…
2099 maq_s.w.phl $ac1, $t2, $t3 :: rs 0x00000000 rt 0x00000000 inHI 0x00000000 inLO 0x55555555 outHI 0x0…
2100 maq_s.w.phl $ac2, $t4, $t1 :: rs 0x80000000 rt 0x80000000 inHI 0xffffffff inLO 0xffff2435 outHI 0x0…
[all …]
/external/llvm/test/MC/Disassembler/Mips/dspr2/
Dvalid.txt73 0x7c 0x64 0x15 0x30 # CHECK: maq_s.w.phl $ac2, $3, $4
74 0x7c 0xa6 0x1c 0x30 # CHECK: maq_sa.w.phl $ac3, $5, $6
93 0x7e 0xd7 0xaf 0x10 # CHECK: muleq_s.w.phl $21, $22, $23
110 0x7c 0x15 0xa3 0x12 # CHECK: preceq.w.phl $20, $21
/external/llvm/test/CodeGen/Mips/
Ddsp-r1.ll217 ; CHECK: maq_s.w.phl
221 %3 = tail call i64 @llvm.mips.maq.s.w.phl(i64 %a0, <2 x i16> %1, <2 x i16> %2)
225 declare i64 @llvm.mips.maq.s.w.phl(i64, <2 x i16>, <2 x i16>) nounwind
241 ; CHECK: maq_sa.w.phl
245 %3 = tail call i64 @llvm.mips.maq.sa.w.phl(i64 %a0, <2 x i16> %1, <2 x i16> %2)
249 declare i64 @llvm.mips.maq.sa.w.phl(i64, <2 x i16>, <2 x i16>) nounwind
578 ; CHECK: muleq_s.w.phl
582 %2 = tail call i32 @llvm.mips.muleq.s.w.phl(<2 x i16> %0, <2 x i16> %1)
586 declare i32 @llvm.mips.muleq.s.w.phl(<2 x i16>, <2 x i16>) nounwind
1018 ; CHECK: preceq.w.phl
[all …]
/external/llvm/lib/Target/Mips/
DMicroMipsDSPInstrInfo.td70 class PRECEQ_W_PHL_MM_ENC : POOL32A_2R_FMT<"preceq.w.phl", 0b0101000100>;
115 class MULEQ_S_W_PHL_MM_ENC : POOL32A_3RB0_FMT<"muleq_s.w.phl", 0b0000100101>;
136 class MAQ_S_W_PHL_MM_ENC : POOL32A_2RAC_FMT<"maq_s.w.phl", 0b01101001>;
137 class MAQ_SA_W_PHL_MM_ENC : POOL32A_2RAC_FMT<"maq_sa.w.phl", 0b11101001>;
176 "preceq.w.phl", int_mips_preceq_w_phl, NoItinerary, GPR32Opnd, DSPROpnd>;
DMipsDSPInstrInfo.td626 class PRECEQ_W_PHL_DESC : ABSQ_S_PH_R2_DESC_BASE<"preceq.w.phl",
738 class MULEQ_S_W_PHL_DESC : ADDU_QB_DESC_BASE<"muleq_s.w.phl",
756 class MAQ_S_W_PHL_DESC : DPA_W_PH_DESC_BASE<"maq_s.w.phl", MipsMAQ_S_W_PHL>,
762 class MAQ_SA_W_PHL_DESC : DPA_W_PH_DESC_BASE<"maq_sa.w.phl", MipsMAQ_SA_W_PHL>,
/external/google-benchmark/
DCONTRIBUTORS38 Pascal Leroy <phl@google.com>
/external/llvm/test/MC/Mips/mips32r2/
Dinvalid-dsp.s46 …maq_s.w.phl $ac2,$25,$11 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
48 …maq_sa.w.phl $ac3,$a1,$v1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
56 …muleq_s.w.phl $11,$s4,$s4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
Dinvalid-dspr2.s64 …maq_s.w.phl $ac2,$25,$11 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
66 …maq_sa.w.phl $ac3,$a1,$v1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
77 …muleq_s.w.phl $11,$s4,$s4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
/external/llvm/test/MC/Disassembler/Mips/micromips-dspr2/
Dvalid.txt51 0x00 0x22 0x51 0x3c # CHECK: preceq.w.phl $1, $2
118 0x00 0x62 0x08 0x25 # CHECK: muleq_s.w.phl $1, $2, $3
/external/libjpeg-turbo/simd/
Djsimd_mips_dspr2.S2147 muleq_s.w.phl v0, t0, s0 // tmp0 ...
2178 muleq_s.w.phl v0, t2, s1 // tmp1 ...
2183 muleq_s.w.phl v1, t4, s2 // tmp2 ...
2188 muleq_s.w.phl v0, t6, s3 // tmp3 ...
2199 muleq_s.w.phl v0, t1, s0 // tmp4 ...
2204 muleq_s.w.phl v1, t7, s3 // tmp7 ...
2209 muleq_s.w.phl v0, t5, s2 // tmp6 ...
2214 muleq_s.w.phl v1, t3, s1 // tmp5 ...
/external/hyphenation-patterns/ga/
Dhyph-ga.pat.txt4601 phlé5an
/external/chromium-trace/catapult/tracing/test_data/
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