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Searched refs:phr (Results 1 – 21 of 21) sorted by relevance

/external/llvm/test/MC/Mips/micromips-dsp/
Dvalid.s40 preceq.w.phr $3, $4 # CHECK: preceq.w.phr $3, $4 # encoding: [0x00,0x64,0x61,0x3c]
81 muleq_s.w.phr $1, $2, $3 # CHECK: muleq_s.w.phr $1, $2, $3 # encoding: [0x00,0x62,0x08,0x65]
90 …maq_s.w.phr $ac1, $2, $3 # CHECK: maq_s.w.phr $ac1, $2, $3 # encoding: [0x00,0x62,0x4a,0x7…
91 …maq_sa.w.phr $ac1, $2, $3 # CHECK: maq_sa.w.phr $ac1, $2, $3 # encoding: [0x00,0x62,0x6a,0x7…
/external/llvm/test/MC/Mips/dsp/
Dvalid.s55 …maq_s.w.phr $ac0, $7, $8 # CHECK: maq_s.w.phr $ac0, $7, $8 # encoding: [0x7c,0x…
56 …maq_sa.w.phr $ac1, $9, $10 # CHECK: maq_sa.w.phr $ac1, $9, $10 # encoding: [0x7d,0x…
72 …muleq_s.w.phr $24, $25, $26 # CHECK: muleq_s.w.phr $24, $25, $26 # encoding: [0x7f,0x…
85 …preceq.w.phr $21, $22 # CHECK: preceq.w.phr $21, $22 # encoding: [0x7c,0x…
/external/webrtc/webrtc/modules/video_capture/windows/
Dsink_filter_ds.cc375 OUT HRESULT * phr, in CaptureSinkFilter() argument
383 (* phr) = S_OK; in CaptureSinkFilter()
387 phr, L"VideoCapture"); in CaptureSinkFilter()
388 if (m_pInput == NULL || FAILED (* phr)) in CaptureSinkFilter()
390 (* phr) = FAILED (* phr) ? (* phr) : E_OUTOFMEMORY; in CaptureSinkFilter()
Dsink_filter_ds.h58 OUT HRESULT * phr,
90 static CUnknown * CreateInstance (IN LPUNKNOWN punk, OUT HRESULT * phr);
/external/llvm/test/MC/Mips/dspr2/
Dvalid.s77 …maq_s.w.phr $ac0, $7, $8 # CHECK: maq_s.w.phr $ac0, $7, $8 # encoding: [0x7c,0xe8,0…
78 …maq_sa.w.phr $ac1, $9, $10 # CHECK: maq_sa.w.phr $ac1, $9, $10 # encoding: [0x7d,0x2a,0…
96 …muleq_s.w.phr $24, $25, $26 # CHECK: muleq_s.w.phr $24, $25, $26 # encoding: [0x7f,0x3a,0…
113 …preceq.w.phr $21,$22 # CHECK: preceq.w.phr $21, $22 # encoding: [0x7c,0x16,0…
/external/llvm/test/MC/Disassembler/Mips/micromips-dsp/
Dvalid.txt39 0x00 0x64 0x61 0x3c # CHECK: preceq.w.phr $3, $4
80 0x00 0x62 0x08 0x65 # CHECK: muleq_s.w.phr $1, $2, $3
89 0x00 0x62 0x4a 0x7c # CHECK: maq_s.w.phr $ac1, $2, $3
90 0x00 0x62 0x6a 0x7c # CHECK: maq_sa.w.phr $ac1, $2, $3
/external/llvm/test/MC/Mips/micromips-dspr2/
Dvalid.s53 preceq.w.phr $3, $4 # CHECK: preceq.w.phr $3, $4 # encoding: [0x00,0x64,0x61,0x3c]
120 muleq_s.w.phr $1, $2, $3 # CHECK: muleq_s.w.phr $1, $2, $3 # encoding: [0x00,0x62,0x08,0x65]
/external/llvm/test/MC/Disassembler/Mips/dsp/
Dvalid.txt53 0x7c 0xe8 0x05 0xb0 # CHECK: maq_s.w.phr $ac0, $7, $8
54 0x7d 0x2a 0x0c 0xb0 # CHECK: maq_sa.w.phr $ac1, $9, $10
70 0x7f 0x3a 0xc7 0x50 # CHECK: muleq_s.w.phr $24, $25, $26
83 0x7c 0x16 0xab 0x52 # CHECK: preceq.w.phr $21, $22
/external/valgrind/none/tests/mips32/
Dmips32_dsp.stdout.exp-BE1993 maq_s.w.phr $ac3, $t4, $t5 :: rs 0x00000000 rt 0x00000000 inHI 0xffffffff inLO 0x80000000 outHI 0xf…
1994 maq_s.w.phr $ac0, $t0, $t1 :: rs 0x00000004 rt 0x40000000 inHI 0x00000000 inLO 0x00000006 outHI 0x0…
1995 maq_s.w.phr $ac1, $t2, $t3 :: rs 0x80002435 rt 0x80003421 inHI 0x00000000 inLO 0x40000000 outHI 0x0…
1996 maq_s.w.phr $ac3, $t6, $t7 :: rs 0x76548000 rt 0x73468000 inHI 0x00000000 inLO 0x7fffffff outHI 0x0…
1997 maq_s.w.phr $ac0, $t5, $t3 :: rs 0x80000000 rt 0x80000000 inHI 0x00000000 inLO 0x00000001 outHI 0x0…
1998 maq_s.w.phr $ac1, $t2, $t4 :: rs 0x00010001 rt 0xffffffff inHI 0xffffffff inLO 0xffffffff outHI 0xf…
1999 maq_s.w.phr $ac2, $t0, $t8 :: rs 0x7fff7fff rt 0x7fff7fff inHI 0xffffffff inLO 0xffffffff outHI 0x0…
2000 maq_s.w.phr $ac0, $t0, $t1 :: rs 0x0000c420 rt 0x00000555 inHI 0x00000000 inLO 0x0fde3126 outHI 0x0…
2001 maq_s.w.phr $ac1, $t2, $t3 :: rs 0x00000000 rt 0x00000000 inHI 0x00000000 inLO 0x55555555 outHI 0x0…
2002 maq_s.w.phr $ac2, $t4, $t1 :: rs 0x80000000 rt 0x80000000 inHI 0xffffffff inLO 0xffff2435 outHI 0xf…
[all …]
Dmips32_dsp.stdout.exp-LE1993 maq_s.w.phr $ac3, $t4, $t5 :: rs 0x00000000 rt 0x00000000 inHI 0xffffffff inLO 0x80000000 outHI 0xf…
1994 maq_s.w.phr $ac0, $t0, $t1 :: rs 0x00000004 rt 0x40000000 inHI 0x00000000 inLO 0x00000006 outHI 0x0…
1995 maq_s.w.phr $ac1, $t2, $t3 :: rs 0x80002435 rt 0x80003421 inHI 0x00000000 inLO 0x40000000 outHI 0x0…
1996 maq_s.w.phr $ac3, $t6, $t7 :: rs 0x76548000 rt 0x73468000 inHI 0x00000000 inLO 0x7fffffff outHI 0x0…
1997 maq_s.w.phr $ac0, $t5, $t3 :: rs 0x80000000 rt 0x80000000 inHI 0x00000000 inLO 0x00000001 outHI 0x0…
1998 maq_s.w.phr $ac1, $t2, $t4 :: rs 0x00010001 rt 0xffffffff inHI 0xffffffff inLO 0xffffffff outHI 0xf…
1999 maq_s.w.phr $ac2, $t0, $t8 :: rs 0x7fff7fff rt 0x7fff7fff inHI 0xffffffff inLO 0xffffffff outHI 0x0…
2000 maq_s.w.phr $ac0, $t0, $t1 :: rs 0x0000c420 rt 0x00000555 inHI 0x00000000 inLO 0x0fde3126 outHI 0x0…
2001 maq_s.w.phr $ac1, $t2, $t3 :: rs 0x00000000 rt 0x00000000 inHI 0x00000000 inLO 0x55555555 outHI 0x0…
2002 maq_s.w.phr $ac2, $t4, $t1 :: rs 0x80000000 rt 0x80000000 inHI 0xffffffff inLO 0xffff2435 outHI 0xf…
[all …]
/external/llvm/test/MC/Disassembler/Mips/dspr2/
Dvalid.txt75 0x7c 0xe8 0x05 0xb0 # CHECK: maq_s.w.phr $ac0, $7, $8
76 0x7d 0x2a 0x0c 0xb0 # CHECK: maq_sa.w.phr $ac1, $9, $10
94 0x7f 0x3a 0xc7 0x50 # CHECK: muleq_s.w.phr $24, $25, $26
111 0x7c 0x16 0xab 0x52 # CHECK: preceq.w.phr $21, $22
/external/llvm/test/CodeGen/Mips/
Ddsp-r1.ll229 ; CHECK: maq_s.w.phr
233 %3 = tail call i64 @llvm.mips.maq.s.w.phr(i64 %a0, <2 x i16> %1, <2 x i16> %2)
237 declare i64 @llvm.mips.maq.s.w.phr(i64, <2 x i16>, <2 x i16>) nounwind
253 ; CHECK: maq_sa.w.phr
257 %3 = tail call i64 @llvm.mips.maq.sa.w.phr(i64 %a0, <2 x i16> %1, <2 x i16> %2)
261 declare i64 @llvm.mips.maq.sa.w.phr(i64, <2 x i16>, <2 x i16>) nounwind
590 ; CHECK: muleq_s.w.phr
594 %2 = tail call i32 @llvm.mips.muleq.s.w.phr(<2 x i16> %0, <2 x i16> %1)
598 declare i32 @llvm.mips.muleq.s.w.phr(<2 x i16>, <2 x i16>) nounwind
1029 ; CHECK: preceq.w.phr
[all …]
/external/llvm/lib/Target/Mips/
DMicroMipsDSPInstrInfo.td71 class PRECEQ_W_PHR_MM_ENC : POOL32A_2R_FMT<"preceq.w.phr", 0b0110000100>;
116 class MULEQ_S_W_PHR_MM_ENC : POOL32A_3RB0_FMT<"muleq_s.w.phr", 0b0001100101>;
138 class MAQ_S_W_PHR_MM_ENC : POOL32A_2RAC_FMT<"maq_s.w.phr", 0b00101001>;
139 class MAQ_SA_W_PHR_MM_ENC : POOL32A_2RAC_FMT<"maq_sa.w.phr", 0b10101001>;
178 "preceq.w.phr", int_mips_preceq_w_phr, NoItinerary, GPR32Opnd, DSPROpnd>;
DMipsDSPInstrInfo.td630 class PRECEQ_W_PHR_DESC : ABSQ_S_PH_R2_DESC_BASE<"preceq.w.phr",
743 class MULEQ_S_W_PHR_DESC : ADDU_QB_DESC_BASE<"muleq_s.w.phr",
759 class MAQ_S_W_PHR_DESC : DPA_W_PH_DESC_BASE<"maq_s.w.phr", MipsMAQ_S_W_PHR>,
765 class MAQ_SA_W_PHR_DESC : DPA_W_PH_DESC_BASE<"maq_sa.w.phr", MipsMAQ_SA_W_PHR>,
/external/llvm/test/MC/Mips/mips32r2/
Dinvalid-dsp.s47 …maq_s.w.phr $ac0,$10,$25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
49 …maq_sa.w.phr $ac1,$at,$10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
57 …muleq_s.w.phr $s6,$a0,$s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
Dinvalid-dspr2.s65 …maq_s.w.phr $ac0,$10,$25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
67 …maq_sa.w.phr $ac1,$at,$10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
78 …muleq_s.w.phr $s6,$a0,$s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
/external/llvm/test/MC/Disassembler/Mips/micromips-dspr2/
Dvalid.txt52 0x00 0x64 0x61 0x3c # CHECK: preceq.w.phr $3, $4
119 0x00 0x62 0x08 0x65 # CHECK: muleq_s.w.phr $1, $2, $3
/external/icu/icu4c/source/data/unit/
Den_AU.txt196 per{"{0} phr"}
/external/libjpeg-turbo/simd/
Djsimd_mips_dspr2.S2152 muleq_s.w.phr t0, t0, s0 // ... tmp0 ...
2179 muleq_s.w.phr t2, t2, s1 // ... tmp1 ...
2184 muleq_s.w.phr t4, t4, s2 // ... tmp2 ...
2189 muleq_s.w.phr t6, t6, s3 // ... tmp3 ...
2200 muleq_s.w.phr t1, t1, s0 // ... tmp4 ...
2205 muleq_s.w.phr t7, t7, s3 // ... tmp7 ...
2210 muleq_s.w.phr t5, t5, s2 // ... tmp6 ...
2215 muleq_s.w.phr t3, t3, s1 // ... tmp5 ...
/external/hyphenation-patterns/ga/
Dhyph-ga.pat.txt4609 phréach5
4610 phréacht6
4611 phróis5
/external/chromium-trace/catapult/tracing/test_data/
Dddms_calculator_start.trace73147 i��phr�$���