/external/icu/icu4c/source/layout/ |
D | LayoutEngine.cpp | 223 LEUnicode *reordered = NULL; in characterProcessing() local 237 reordered = LE_NEW_ARRAY(LEUnicode, count); in characterProcessing() 239 if (reordered == NULL) { in characterProcessing() 245 … CanonShaping::reorderMarks(&chars[offset], count, rightToLeft, reordered, fakeGlyphStorage); in characterProcessing() 246 inChars = reordered; in characterProcessing() 266 if (reordered != NULL) { in characterProcessing() 267 LE_DELETE_ARRAY(reordered); in characterProcessing()
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/external/autotest/server/cros/dynamic_suite/ |
D | host_spec_unittest.py | 33 reordered = host_spec.order_by_complexity(self._SPECS) 36 self.assertTrue(spec in reordered[:-1]) 37 self.assertEquals(self._SPECS[0], reordered[-1])
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/external/guava/guava-gwt/test-super/com/google/common/collect/super/com/google/common/collect/ |
D | AbstractTableReadTest.java | 123 Table<String, Integer, Character> reordered in testEquals() local 133 .addEqualityGroup(table, hashCopy, reordered) in testEquals()
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D | ArrayTableTest.java | 118 Table<String, Integer, Character> reordered in testEquals() local 128 .addEqualityGroup(table, reordered) in testEquals()
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/external/guava/guava-tests/test/com/google/common/collect/ |
D | AbstractTableReadTest.java | 125 Table<String, Integer, Character> reordered in testEquals() local 135 .addEqualityGroup(table, hashCopy, reordered) in testEquals()
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D | ArrayTableTest.java | 120 Table<String, Integer, Character> reordered in testEquals() local 130 .addEqualityGroup(table, reordered) in testEquals()
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/external/bison/build-aux/ |
D | announce-gen | 264 my @reordered; 270 and push @reordered, $target; 274 push @reordered, sort keys %changelog; 277 @reordered = map { s!^\./!!; $_ } @reordered; 280 # print join ("\n", @reordered), "\n"; 285 my $cmd = "cvs -n diff -u -r$prev_cvs_tag -rHEAD @reordered";
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-sitofp-combine-chains.ll | 6 ; and could be reordered.
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D | global-merge-ignore-single-use.ll | 5 ; We assume that globals of the same size aren't reordered inside a set.
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D | global-merge-ignore-single-use-minsize.ll | 6 ; We assume that globals of the same size aren't reordered inside a set.
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D | global-merge-group-by-use.ll | 5 ; We assume that globals of the same size aren't reordered inside a set.
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/external/eigen/Eigen/ |
D | SparseQR | 12 * The columns of the input matrix should be reordered to limit the fill-in during the
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/external/llvm/test/CodeGen/X86/ |
D | win64_call_epi.ll | 33 ; Check it still works when blocks are reordered.
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D | stores-merging.ll | 43 ;; these must not be reordered in MergeConsecutiveStores such that the
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D | misched-matrix.ll | 15 ; been reordered with the stores. This tests the scheduler's cheap
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/external/llvm/test/CodeGen/ARM/ |
D | swift-atomics.ll | 18 ; followed by an acquire does not get reordered. In that case a "dmb ishst" is
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/external/llvm/test/Linker/ |
D | subprogram-linkonce-weak.ll | 69 ; Same as above, but reordered. 125 ; The DWARF output is already symmetric (just reordered).
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/external/sonivox/arm-wt-22k/lib_src/ |
D | ARM-E_voice_gain_gnu.s | 79 @ NOTE: instructions are reordered to reduce the effect of latency
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/external/webrtc/tools/matlab/ |
D | rtpAnalyze.m | 136 delayOrdered(reorderIx) = nan; % Set reordered packets to NaN. 137 delayReordered = delay(reorderIx); % Pick the reordered packets.
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/external/llvm/test/DebugInfo/X86/ |
D | fission-inline.ll | 26 ; that the 'f1()' call from f3 was reordered to appear between the two inlined
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/external/llvm/test/Transforms/SimplifyCFG/ |
D | merge-cond-stores.ll | 205 ; branch would now be reordered with respect to the call if we if-converted,
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/external/llvm/include/llvm/IR/ |
D | Intrinsics.td | 37 // moved across stores. However, it can be reordered otherwise and can be 310 // however it does conveniently prevent the prefetch from being reordered
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/external/llvm/test/CodeGen/PowerPC/ |
D | vsx-fma-m.ll | 258 ; FMAs are reordered differently, the algorithm can pick a different
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/external/llvm/docs/CommandGuide/ |
D | FileCheck.rst | 259 the surrounding ``CHECK-DAG:`` directives cannot be reordered, i.e. all
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/external/llvm/test/Transforms/InstCombine/ |
D | vec_shuffle.ll | 409 ; In PR20059 ( http://llvm.org/pr20059 ), shufflevector operations are reordered/removed
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