Searched refs:rr0 (Results 1 – 3 of 3) sorted by relevance
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonBitTracker.cpp | 187 auto rr0 = [this,Reg] (const BT::RegisterCell &Val, CellMapType &Outputs) in evaluate() local
252 return rr0(eIMM(im(1), W0), Outputs); in evaluate()
254 return rr0(RegisterCell(W0).fill(0, W0, BT::BitValue::Zero), Outputs); in evaluate()
256 return rr0(RegisterCell(W0).fill(0, W0, BT::BitValue::One), Outputs); in evaluate()
264 return rr0(RC, Outputs); in evaluate()
272 return rr0(rc(1), Outputs); in evaluate()
280 return rr0(RC, Outputs); in evaluate()
285 return rr0(eINS(RC, eXTR(rc(1), 0, W0), 0), Outputs); in evaluate()
300 return rr0(RC, Outputs); in evaluate()
304 return rr0(eADD(rc(1), rc(2)), Outputs); in evaluate()
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| /external/llvm/lib/Target/X86/ |
| D | X86SchedHaswell.td | 1613 def : InstRW<[WriteFVarBlend], (instregex "BLENDVP(S|D)rr0")>;
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| D | X86InstrSSE.td | 7225 def rr0 : SS48I<opc, MRMSrcReg, (outs VR128:$dst),
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