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/external/valgrind/none/tests/mips32/
DMIPS32int.stdout.exp-mips32-BE2 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000
3 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000000, rt 0x00000001
4 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000001, rt 0x00000000
5 add $t0, $t1, $t2 :: rd 0x00000002 rs 0x00000001, rt 0x00000001
6 add $t0, $t1, $t2 :: rd 0xffffffff rs 0x00000000, rt 0xffffffff
7 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000001, rt 0xffffffff
8 add $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000000
9 add $t0, $t1, $t2 :: rd 0x5859704f rs 0x31415927, rt 0x27181728
10 add $t0, $t1, $t2 :: rd 0xc859704f rs 0x31415927, rt 0x97181728
11 add $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000
[all …]
DMIPS32int.stdout.exp-mips32-LE2 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000
3 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000000, rt 0x00000001
4 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000001, rt 0x00000000
5 add $t0, $t1, $t2 :: rd 0x00000002 rs 0x00000001, rt 0x00000001
6 add $t0, $t1, $t2 :: rd 0xffffffff rs 0x00000000, rt 0xffffffff
7 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000001, rt 0xffffffff
8 add $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000000
9 add $t0, $t1, $t2 :: rd 0x5859704f rs 0x31415927, rt 0x27181728
10 add $t0, $t1, $t2 :: rd 0xc859704f rs 0x31415927, rt 0x97181728
11 add $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000
[all …]
DMIPS32int.stdout.exp-mips32r2-LE2 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000
3 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000000, rt 0x00000001
4 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000001, rt 0x00000000
5 add $t0, $t1, $t2 :: rd 0x00000002 rs 0x00000001, rt 0x00000001
6 add $t0, $t1, $t2 :: rd 0xffffffff rs 0x00000000, rt 0xffffffff
7 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000001, rt 0xffffffff
8 add $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000000
9 add $t0, $t1, $t2 :: rd 0x5859704f rs 0x31415927, rt 0x27181728
10 add $t0, $t1, $t2 :: rd 0xc859704f rs 0x31415927, rt 0x97181728
11 add $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000
[all …]
DMIPS32int.stdout.exp-mips32r2-BE2 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000
3 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000000, rt 0x00000001
4 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000001, rt 0x00000000
5 add $t0, $t1, $t2 :: rd 0x00000002 rs 0x00000001, rt 0x00000001
6 add $t0, $t1, $t2 :: rd 0xffffffff rs 0x00000000, rt 0xffffffff
7 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000001, rt 0xffffffff
8 add $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000000
9 add $t0, $t1, $t2 :: rd 0x5859704f rs 0x31415927, rt 0x27181728
10 add $t0, $t1, $t2 :: rd 0xc859704f rs 0x31415927, rt 0x97181728
11 add $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000
[all …]
Dmips32_dsp.stdout.exp-BE2 absq_s.ph $t0, $t1 :: rd 0x00000000 rt 0x00000000 DSPControl 0x0
3 absq_s.ph $t2, $t3 :: rd 0x00000286 rt 0x00000286 DSPControl 0x0
4 absq_s.ph $t4, $t1 :: rd 0x05442435 rt 0xfabc2435 DSPControl 0x0
5 absq_s.ph $t6, $t7 :: rd 0x73467fff rt 0x73468000 DSPControl 0x100000
6 absq_s.ph $t5, $t3 :: rd 0x7fff0000 rt 0x80000000 DSPControl 0x100000
7 absq_s.ph $t2, $t4 :: rd 0x00010001 rt 0xffffffff DSPControl 0x0
8 absq_s.ph $t0, $t8 :: rd 0x000c5fff rt 0xfff45fff DSPControl 0x0
9 absq_s.ph $t4, $t4 :: rd 0x00000555 rt 0x00000555 DSPControl 0x0
10 absq_s.ph $t0, $t1 :: rd 0x23534870 rt 0x23534870 DSPControl 0x0
11 absq_s.ph $t2, $t3 :: rd 0x05555214 rt 0x0555adec DSPControl 0x0
[all …]
Dmips32_dsp.stdout.exp-LE2 absq_s.ph $t0, $t1 :: rd 0x00000000 rt 0x00000000 DSPControl 0x0
3 absq_s.ph $t2, $t3 :: rd 0x00000286 rt 0x00000286 DSPControl 0x0
4 absq_s.ph $t4, $t1 :: rd 0x05442435 rt 0xfabc2435 DSPControl 0x0
5 absq_s.ph $t6, $t7 :: rd 0x73467fff rt 0x73468000 DSPControl 0x100000
6 absq_s.ph $t5, $t3 :: rd 0x7fff0000 rt 0x80000000 DSPControl 0x100000
7 absq_s.ph $t2, $t4 :: rd 0x00010001 rt 0xffffffff DSPControl 0x0
8 absq_s.ph $t0, $t8 :: rd 0x000c5fff rt 0xfff45fff DSPControl 0x0
9 absq_s.ph $t4, $t4 :: rd 0x00000555 rt 0x00000555 DSPControl 0x0
10 absq_s.ph $t0, $t1 :: rd 0x23534870 rt 0x23534870 DSPControl 0x0
11 absq_s.ph $t2, $t3 :: rd 0x05555214 rt 0x0555adec DSPControl 0x0
[all …]
Dmips32_dspr2.stdout.exp2 absq_s.qb $t0, $t1 :: rd 0x00000000 rt 0x00000000 DSPControl 0x0
3 absq_s.qb $t2, $t3 :: rd 0x0000027a rt 0x00000286 DSPControl 0x0
4 absq_s.qb $t4, $t1 :: rd 0x06442435 rt 0xfabc2435 DSPControl 0x0
5 absq_s.qb $t6, $t7 :: rd 0x73467f44 rt 0x734680bc DSPControl 0x100000
6 absq_s.qb $t5, $t3 :: rd 0x7f000000 rt 0x80000000 DSPControl 0x100000
7 absq_s.qb $t2, $t4 :: rd 0x01010101 rt 0xffffffff DSPControl 0x0
8 absq_s.qb $t0, $t8 :: rd 0x010c5f01 rt 0xfff45fff DSPControl 0x0
9 absq_s.qb $t4, $t4 :: rd 0x00000555 rt 0x00000555 DSPControl 0x0
10 absq_s.qb $t0, $t1 :: rd 0x23534870 rt 0x23534870 DSPControl 0x0
11 absq_s.qb $t2, $t3 :: rd 0x05555314 rt 0x0555adec DSPControl 0x0
[all …]
DMoveIns.stdout.exp-BE2 mfc1 $t1, $f0 :: fs 4.676074, rt 0x4095a266
3 mfc1 $t2, $f1 :: fs 272008302207532160516096.000000, rt 0x66666666
4 mfc1 $t3, $f2 :: fs -1.875000, rt 0xbff00000
5 mfc1 $t4, $f3 :: fs 0.000000, rt 0x0
6 mfc1 $t5, $f4 :: fs 1.875000, rt 0x3ff00000
7 mfc1 $t6, $f5 :: fs 0.000000, rt 0x0
8 mfc1 $t7, $f6 :: fs 0.000000, rt 0x252a2e2b
9 mfc1 $v0, $f7 :: fs 0.000000, rt 0x262d2d2a
10 mfc1 $v1, $f8 :: fs nan, rt 0xffffffff
11 mfc1 $s0, $f9 :: fs nan, rt 0xffffffff
[all …]
DMoveIns.stdout.exp2 mfc1 $t1, $f0 :: fs 4.676074, rt 0x4095a266
3 mfc1 $t2, $f1 :: fs 272008302207532160516096.000000, rt 0x66666666
4 mfc1 $t3, $f2 :: fs -1.875000, rt 0xbff00000
5 mfc1 $t4, $f3 :: fs 0.000000, rt 0x0
6 mfc1 $t5, $f4 :: fs 1.875000, rt 0x3ff00000
7 mfc1 $t6, $f5 :: fs 0.000000, rt 0x0
8 mfc1 $t7, $f6 :: fs 0.000000, rt 0x252a2e2b
9 mfc1 $v0, $f7 :: fs 0.000000, rt 0x262d2d2a
10 mfc1 $v1, $f8 :: fs nan, rt 0xffffffff
11 mfc1 $s0, $f9 :: fs nan, rt 0xffffffff
[all …]
/external/valgrind/none/tests/mips64/
Dshift_instructions.stdout.exp-mips641 dsll $t0, $t1, 0x00 :: rt 0x0, rs 0x0, imm 0x0000
2 dsll $t2, $t3, 0x1f :: rt 0x0, rs 0x0, imm 0x001f
3 dsll $a0, $a1, 0x0f :: rt 0x0, rs 0x0, imm 0x000f
4 dsll $s0, $s1, 0x03 :: rt 0x0, rs 0x0, imm 0x0003
5 dsll $t0, $t1, 0x00 :: rt 0x12bd6aa, rs 0x12bd6aa, imm 0x0000
6 dsll $t2, $t3, 0x1f :: rt 0x95eb5500000000, rs 0x12bd6aa, imm 0x001f
7 dsll $a0, $a1, 0x0f :: rt 0x95eb550000, rs 0x12bd6aa, imm 0x000f
8 dsll $s0, $s1, 0x03 :: rt 0x95eb550, rs 0x12bd6aa, imm 0x0003
9 dsll $t0, $t1, 0x00 :: rt 0x0, rs 0x0, imm 0x0000
10 dsll $t2, $t3, 0x1f :: rt 0x0, rs 0x0, imm 0x001f
[all …]
Dshift_instructions.stdout.exp-mips64r21 drotr $t0, $t1, 0x00 :: rt 0x0, rs 0x0, imm 0x0000
2 drotr $t2, $t3, 0x1f :: rt 0x0, rs 0x0, imm 0x001f
3 drotr $a0, $a1, 0x0f :: rt 0x0, rs 0x0, imm 0x000f
4 drotr $s0, $s1, 0x03 :: rt 0x0, rs 0x0, imm 0x0003
5 drotr $t0, $t1, 0x00 :: rt 0x12bd6aa, rs 0x12bd6aa, imm 0x0000
6 drotr $t2, $t3, 0x1f :: rt 0x257ad5400000000, rs 0x12bd6aa, imm 0x001f
7 drotr $a0, $a1, 0x0f :: rt 0xad54000000000257, rs 0x12bd6aa, imm 0x000f
8 drotr $s0, $s1, 0x03 :: rt 0x4000000000257ad5, rs 0x12bd6aa, imm 0x0003
9 drotr $t0, $t1, 0x00 :: rt 0x0, rs 0x0, imm 0x0000
10 drotr $t2, $t3, 0x1f :: rt 0x0, rs 0x0, imm 0x001f
[all …]
Darithmetic_instruction.stdout.exp-mips64r21 add $t0, $t1, $t2 :: rd 0xffffffffb1f740b4, rs 0x0, rt 0xffffffffb1f740b4
2 add $t0, $t1, $t2 :: rd 0xffffffffb5365d03, rs 0x0, rt 0xffffffffb5365d03
3 add $t0, $t1, $t2 :: rd 0xffffffffc1f7b748, rs 0x9823b6e, rt 0xffffffffb8757bda
4 add $t0, $t1, $t2 :: rd 0xffffffffc9f78d46, rs 0xd4326d9, rt 0xffffffffbcb4666d
5 add $t0, $t1, $t2 :: rd 0xffffffffb5f7ad44, rs 0x130476dc, rt 0xffffffffa2f33668
6 add $t0, $t1, $t2 :: rd 0xffffffffbdf7974a, rs 0x17c56b6b, rt 0xffffffffa6322bdf
7 add $t0, $t1, $t2 :: rd 0xffffffffc5f75ab8, rs 0x1a864db2, rt 0xffffffffab710d06
8 add $t0, $t1, $t2 :: rd 0xffffffffcdf760b6, rs 0x1e475005, rt 0xffffffffafb010b1
9 add $t0, $t1, $t2 :: rd 0xffffffffbe089ac4, rs 0x2608edb8, rt 0xffffffff97ffad0c
10 add $t0, $t1, $t2 :: rd 0xffffffffb608a0ca, rs 0x22c9f00f, rt 0xffffffff933eb0bb
[all …]
Darithmetic_instruction.stdout.exp-mips641 add $t0, $t1, $t2 :: rd 0xffffffffb1f740b4, rs 0x0, rt 0xffffffffb1f740b4
2 add $t0, $t1, $t2 :: rd 0xffffffffb5365d03, rs 0x0, rt 0xffffffffb5365d03
3 add $t0, $t1, $t2 :: rd 0xffffffffc1f7b748, rs 0x9823b6e, rt 0xffffffffb8757bda
4 add $t0, $t1, $t2 :: rd 0xffffffffc9f78d46, rs 0xd4326d9, rt 0xffffffffbcb4666d
5 add $t0, $t1, $t2 :: rd 0xffffffffb5f7ad44, rs 0x130476dc, rt 0xffffffffa2f33668
6 add $t0, $t1, $t2 :: rd 0xffffffffbdf7974a, rs 0x17c56b6b, rt 0xffffffffa6322bdf
7 add $t0, $t1, $t2 :: rd 0xffffffffc5f75ab8, rs 0x1a864db2, rt 0xffffffffab710d06
8 add $t0, $t1, $t2 :: rd 0xffffffffcdf760b6, rs 0x1e475005, rt 0xffffffffafb010b1
9 add $t0, $t1, $t2 :: rd 0xffffffffbe089ac4, rs 0x2608edb8, rt 0xffffffff97ffad0c
10 add $t0, $t1, $t2 :: rd 0xffffffffb608a0ca, rs 0x22c9f00f, rt 0xffffffff933eb0bb
[all …]
Dcvm_ins.stdout.exp1 exts $t1, $t2, 1, 7 :: rt 0x0 rs 0x0, p 0x00000001, lenm1 0x00000007
2 exts $t1, $t2, 1, 7 :: rt 0x6e rs 0x130476dc, p 0x00000001, lenm1 0x00000007
3 exts $t1, $t2, 1, 7 :: rt 0xffffffffffffffdc rs 0x2608edb8, p 0x00000001, lenm1 0x00000007
4 exts $t1, $t2, 1, 7 :: rt 0xffffffffffffffb2 rs 0x350c9b64, p 0x00000001, lenm1 0x00000007
5 exts $t1, $t2, 1, 7 :: rt 0xffffffffffffffb8 rs 0x4c11db70, p 0x00000001, lenm1 0x00000007
6 exts $t1, $t2, 1, 7 :: rt 0xffffffffffffffd6 rs 0x5f15adac, p 0x00000001, lenm1 0x00000007
7 exts $t1, $t2, 1, 7 :: rt 0x64 rs 0x6a1936c8, p 0x00000001, lenm1 0x00000007
8 exts $t1, $t2, 1, 7 :: rt 0xa rs 0x791d4014, p 0x00000001, lenm1 0x00000007
9 exts $t1, $t2, 1, 7 :: rt 0x70 rs 0x9823b6e0, p 0x00000001, lenm1 0x00000007
10 exts $t1, $t2, 1, 7 :: rt 0x1e rs 0x8b27c03c, p 0x00000001, lenm1 0x00000007
[all …]
Dlogical_instructions.stdout.exp1 and $t0, $t1, $t2 :: rd 0x0, rs 0x0, rt 0xffffffffb1f740b4
2 and $s0, $s1, $s2 :: rd 0x1284020, rs 0x12bd6aa, rt 0xa2a6ec661ba84121
3 and $t0, $t1, $t2 :: rd 0x0, rs 0x0, rt 0xffffffffb5365d03
4 and $s0, $s1, $s2 :: rd 0x4c834002122303, rs 0x7e876382d2ab13, rt 0x614d9b445f12236b
5 and $t0, $t1, $t2 :: rd 0x8003b4a, rs 0x9823b6e, rt 0xffffffffb8757bda
6 and $s0, $s1, $s2 :: rd 0x1328080203050071, rs 0x976d6e9ac31510f3, rt 0x3baa99471f6d4d75
7 and $t0, $t1, $t2 :: rd 0xc002649, rs 0xd4326d9, rt 0xffffffffbcb4666d
8 and $s0, $s1, $s2 :: rd 0x20044c571216a462, rs 0xb7746d775ad6a5fb, rt 0x680cce5fb236b666
9 and $t0, $t1, $t2 :: rd 0x2003648, rs 0x130476dc, rt 0xffffffffa2f33668
10 and $s0, $s1, $s2 :: rd 0x40a040000401a502, rs 0x42b0c0a28677b502, rt 0x58ec644d6481af17
[all …]
Dcvm_atomic.stdout.exp-LE1 baddu $t3, $t1, $t2 :: rd 0x4, rs 0x42b0c0a28677b502, rt 0x42b0c0a28677b502
2 baddu $t3, $t1, $t2 :: rd 0xa2, rs 0x42b0c0a28677b502, rt 0x9e705cc51ad8dca0
3 baddu $t3, $t1, $t2 :: rd 0x82, rs 0x42b0c0a28677b502, rt 0x47f505569a08a180
4 baddu $t3, $t1, $t2 :: rd 0x99, rs 0x42b0c0a28677b502, rt 0x94ff52fc81afa797
5 baddu $t3, $t1, $t2 :: rd 0xc7, rs 0x42b0c0a28677b502, rt 0x556b3ecaccf17ac5
6 baddu $t3, $t1, $t2 :: rd 0x68, rs 0x42b0c0a28677b502, rt 0x3c2cd9a9cda20766
7 baddu $t3, $t1, $t2 :: rd 0x38, rs 0x42b0c0a28677b502, rt 0xd0d070db710cd036
8 baddu $t3, $t1, $t2 :: rd 0xa9, rs 0x42b0c0a28677b502, rt 0x2f39454412d6e4a7
9 baddu $t3, $t1, $t2 :: rd 0x16, rs 0x42b0c0a28677b502, rt 0xed5005cbc8b0a214
10 baddu $t3, $t1, $t2 :: rd 0x42, rs 0x42b0c0a28677b502, rt 0x87750a04ad765040
[all …]
/external/mesa3d/src/gallium/drivers/svga/
Dsvga_pipe_blend.c97 blend->rt[i].blend_enable = TRUE; in svga_create_blend_state()
98 blend->rt[i].srcblend = SVGA3D_BLENDOP_ONE; in svga_create_blend_state()
99 blend->rt[i].dstblend = SVGA3D_BLENDOP_ONE; in svga_create_blend_state()
100 blend->rt[i].blendeq = SVGA3D_BLENDEQ_SUBTRACT; in svga_create_blend_state()
103 blend->rt[i].blend_enable = TRUE; in svga_create_blend_state()
104 blend->rt[i].srcblend = SVGA3D_BLENDOP_ZERO; in svga_create_blend_state()
105 blend->rt[i].dstblend = SVGA3D_BLENDOP_ZERO; in svga_create_blend_state()
106 blend->rt[i].blendeq = SVGA3D_BLENDEQ_MINIMUM; in svga_create_blend_state()
109 blend->rt[i].blend_enable = FALSE; in svga_create_blend_state()
112 blend->rt[i].blend_enable = TRUE; in svga_create_blend_state()
[all …]
/external/toybox/toys/pending/
Droute.c166 static void is_prefix(char **tip, char **netmask, struct rtentry *rt) in is_prefix() argument
173 (((struct sockaddr_in *)&((rt)->rt_genmask))->sin_addr.s_addr) in is_prefix()
176 rt->rt_genmask.sa_family = AF_INET; in is_prefix()
184 static void get_next_params(char **argv, struct rtentry *rt, char **netmask) in get_next_params() argument
187 if (!strcmp(*argv, "reject")) rt->rt_flags |= RTF_REJECT; in get_next_params()
188 else if (!strcmp(*argv, "mod")) rt->rt_flags |= RTF_MODIFIED; in get_next_params()
189 else if (!strcmp(*argv, "dyn")) rt->rt_flags |= RTF_DYNAMIC; in get_next_params()
190 else if (!strcmp(*argv, "reinstate")) rt->rt_flags |= RTF_REINSTATE; in get_next_params()
196 rt->rt_metric = atolx_range(*argv, 0, ULONG_MAX) + 1; in get_next_params()
200 unsigned int addr_mask = (((struct sockaddr_in *)&((rt)->rt_genmask))->sin_addr.s_addr); in get_next_params()
[all …]
/external/dhcpcd-6.8.2/
Dipv4.c248 static struct rt *
249 find_route(struct rt_head *rts, const struct rt *r, const struct rt *srt) in find_route()
251 struct rt *rt; in find_route() local
255 TAILQ_FOREACH(rt, rts, next) { in find_route()
256 if (rt->dest.s_addr == r->dest.s_addr && in find_route()
258 (srt || (r->iface == NULL || rt->iface == NULL || in find_route()
259 rt->iface->metric == r->iface->metric)) && in find_route()
261 (!srt || srt != rt) && in find_route()
262 rt->net.s_addr == r->net.s_addr) in find_route()
263 return rt; in find_route()
[all …]
/external/v8/src/mips64/
Dassembler-mips64.h602 void beq(Register rs, Register rt, int16_t offset);
603 inline void beq(Register rs, Register rt, Label* L) { in beq() argument
604 beq(rs, rt, shifted_branch_offset(L)); in beq()
607 void bgezc(Register rt, int16_t offset);
608 inline void bgezc(Register rt, Label* L) { in bgezc() argument
609 bgezc(rt, shifted_branch_offset(L)); in bgezc()
611 void bgeuc(Register rs, Register rt, int16_t offset);
612 inline void bgeuc(Register rs, Register rt, Label* L) { in bgeuc() argument
613 bgeuc(rs, rt, shifted_branch_offset(L)); in bgeuc()
615 void bgec(Register rs, Register rt, int16_t offset);
[all …]
Dassembler-mips64.cc297 Register rt; in GetRtReg() local
298 rt.reg_code = (instr & kRtFieldMask) >> kRtShift; in GetRtReg()
299 return rt; in GetRtReg()
505 uint32_t rt = GetRtField(instr); in IsBeqc() local
506 return opcode == POP10 && rs != 0 && rs < rt; // && rt != 0 in IsBeqc()
513 uint32_t rt = GetRtField(instr); in IsBnec() local
514 return opcode == POP30 && rs != 0 && rs < rt; // && rt != 0 in IsBnec()
571 uint32_t rt = GetRt(instr); in IsNop() local
583 rt == static_cast<uint32_t>(ToNumber(nop_rt_reg)) && in IsNop()
969 Register rt, in GenInstrRegister() argument
[all …]
/external/icu/icu4c/source/test/testdata/
DNumberFormatTestCases.txt12 rt: "0.###" 1.0 "1"
21 rt: "0" 1234 "1234"
31 rt: "@@@@" 0.0012 "0.001200"
34 rt: "@###" 0.00123 "0.00123"
35 rt: - 123000 "123000"
41 rt: - 123000 "123,000"
43 rt: - 0.9999 "0.9999"
45 rt: "@##E0" 20000 "2E4"
46 rt: - 27000 "2.7E4"
47 rt: - 27100 "2.71E4"
[all …]
/external/icu/android_icu4j/src/main/tests/android/icu/dev/test/format/
DNumberFormatTestCases.txt12 rt: "0.###" 1.0 "1"
21 rt: "0" 1234 "1234"
31 rt: "@@@@" 0.0012 "0.001200"
34 rt: "@###" 0.00123 "0.00123"
35 rt: - 123000 "123000"
41 rt: - 123000 "123,000"
43 rt: - 0.9999 "0.9999"
45 rt: "@##E0" 20000 "2E4"
46 rt: - 27000 "2.7E4"
47 rt: - 27100 "2.71E4"
[all …]
/external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/test/format/
DNumberFormatTestCases.txt12 rt: "0.###" 1.0 "1"
21 rt: "0" 1234 "1234"
31 rt: "@@@@" 0.0012 "0.001200"
34 rt: "@###" 0.00123 "0.00123"
35 rt: - 123000 "123000"
41 rt: - 123000 "123,000"
43 rt: - 0.9999 "0.9999"
45 rt: "@##E0" 20000 "2E4"
46 rt: - 27000 "2.7E4"
47 rt: - 27100 "2.71E4"
[all …]
/external/v8/src/mips/
Dassembler-mips.h598 void beq(Register rs, Register rt, int16_t offset);
599 inline void beq(Register rs, Register rt, Label* L) { in beq() argument
600 beq(rs, rt, shifted_branch_offset(L)); in beq()
603 void bgezc(Register rt, int16_t offset);
604 inline void bgezc(Register rt, Label* L) { in bgezc() argument
605 bgezc(rt, shifted_branch_offset(L)); in bgezc()
607 void bgeuc(Register rs, Register rt, int16_t offset);
608 inline void bgeuc(Register rs, Register rt, Label* L) { in bgeuc() argument
609 bgeuc(rs, rt, shifted_branch_offset(L)); in bgeuc()
611 void bgec(Register rs, Register rt, int16_t offset);
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