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Searched refs:rt_value (Results 1 – 3 of 3) sorted by relevance

/external/v8/src/arm/
Dsimulator-arm.cc3350 uint32_t rt_value = get_register(rt); in DecodeTypeVFP() local
3351 n_flag_FPSCR_ = (rt_value >> 31) & 1; in DecodeTypeVFP()
3352 z_flag_FPSCR_ = (rt_value >> 30) & 1; in DecodeTypeVFP()
3353 c_flag_FPSCR_ = (rt_value >> 29) & 1; in DecodeTypeVFP()
3354 v_flag_FPSCR_ = (rt_value >> 28) & 1; in DecodeTypeVFP()
3355 FPSCR_default_NaN_mode_ = (rt_value >> 25) & 1; in DecodeTypeVFP()
3356 inexact_vfp_flag_ = (rt_value >> 4) & 1; in DecodeTypeVFP()
3357 underflow_vfp_flag_ = (rt_value >> 3) & 1; in DecodeTypeVFP()
3358 overflow_vfp_flag_ = (rt_value >> 2) & 1; in DecodeTypeVFP()
3359 div_zero_vfp_flag_ = (rt_value >> 1) & 1; in DecodeTypeVFP()
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/external/v8/test/cctest/
Dtest-assembler-mips64.cc4600 uint64_t run_align(uint64_t rs_value, uint64_t rt_value, uint8_t bp) { in run_align() argument
4618 CALL_GENERATED_CODE(isolate, f, rs_value, rt_value, 0, 0, 0)); in run_align()
4630 uint64_t rt_value; in TEST() member
4646 tc[i].rt_value, in TEST()
4653 uint64_t run_dalign(uint64_t rs_value, uint64_t rt_value, uint8_t bp) { in run_dalign() argument
4670 CALL_GENERATED_CODE(isolate, f, rs_value, rt_value, 0, 0, 0)); in run_dalign()
4682 uint64_t rt_value; in TEST() member
4702 tc[i].rt_value, in TEST()
5690 uint64_t run_dsll(uint64_t rt_value, uint16_t sa_value) { in run_dsll() argument
5708 CALL_GENERATED_CODE(isolate, f, rt_value, 0, 0, 0, 0)); in run_dsll()
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Dtest-assembler-mips.cc4545 uint32_t run_align(uint32_t rs_value, uint32_t rt_value, uint8_t bp) { in run_align() argument
4563 isolate, f, rs_value, rt_value, 0, 0, 0)); in run_align()
4575 uint32_t rt_value; in TEST() member
4591 tc[i].rt_value, tc[i].bp)); in TEST()