/external/llvm/test/MC/ARM/ |
D | thumb-fp-armv8.s | 43 vcvtm.s32.f32 s17, s8 44 @ CHECK: vcvtm.s32.f32 s17, s8 @ encoding: [0xff,0xfe,0xc4,0x8a] 45 vcvtm.s32.f64 s17, d8 46 @ CHECK: vcvtm.s32.f64 s17, d8 @ encoding: [0xff,0xfe,0xc8,0x8b] 60 vcvtm.u32.f32 s17, s8 61 @ CHECK: vcvtm.u32.f32 s17, s8 @ encoding: [0xff,0xfe,0x44,0x8a] 62 vcvtm.u32.f64 s17, d8 63 @ CHECK: vcvtm.u32.f64 s17, d8 @ encoding: [0xff,0xfe,0x48,0x8b]
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D | fp-armv8.s | 40 vcvtm.s32.f32 s17, s8 41 @ CHECK: vcvtm.s32.f32 s17, s8 @ encoding: [0xc4,0x8a,0xff,0xfe] 42 vcvtm.s32.f64 s17, d8 43 @ CHECK: vcvtm.s32.f64 s17, d8 @ encoding: [0xc8,0x8b,0xff,0xfe] 57 vcvtm.u32.f32 s17, s8 58 @ CHECK: vcvtm.u32.f32 s17, s8 @ encoding: [0x44,0x8a,0xff,0xfe] 59 vcvtm.u32.f64 s17, d8 60 @ CHECK: vcvtm.u32.f64 s17, d8 @ encoding: [0x48,0x8b,0xff,0xfe]
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D | simple-fp-encoding.s | 362 vcvt.f32.s16 s17, s17, #1 370 vcvt.s16.f32 s17, s17, #1 379 @ CHECK: vcvt.f32.s16 s17, s17, #1 @ encoding: [0x67,0x8a,0xfa,0xee] 388 @ CHECK: vcvt.s16.f32 s17, s17, #1 @ encoding: [0x67,0x8a,0xfe,0xee]
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/external/llvm/test/MC/AArch64/ |
D | neon-scalar-extract-narrow.s | 22 sqxtn h20, s17 35 uqxtn h20, s17
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D | neon-scalar-mul.s | 41 sqdmlal s17, h27, h12
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D | neon-scalar-by-elem-mla.s | 30 fmls s7, s17, v26.s[3]
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D | neon-scalar-shift-imm.s | 73 sqshl s14, s17, #22
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/external/llvm/test/MC/Disassembler/ARM/ |
D | fp-armv8.txt | 47 # CHECK: vcvtm.s32.f32 s17, s8 50 # CHECK: vcvtm.s32.f64 s17, d8 71 # CHECK: vcvtm.u32.f32 s17, s8 74 # CHECK: vcvtm.u32.f64 s17, d8
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D | thumb-fp-armv8.txt | 51 # CHECK: vcvtm.s32.f32 s17, s8 54 # CHECK: vcvtm.s32.f64 s17, d8 75 # CHECK: vcvtm.u32.f32 s17, s8 78 # CHECK: vcvtm.u32.f64 s17, d8
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D | fp-encoding.txt | 250 # CHECK: vstmiaeq r6!, {s14, s15, s16, s17}
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/external/clang/test/CodeGen/ |
D | arm-arguments.c | 99 struct s17 { short f0 : 13; char f1 : 4; }; struct 100 struct s17 f17(void) {} in f17()
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D | ppc64le-aggregates.c | 369 struct s17 { char c[17]; }; argument 423 struct s17 ret_s17() { in ret_s17() 424 return (struct s17) { 17, 18, 19, 20, 21, 22, 23, 24, in ret_s17()
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D | arm64-arguments.c | 73 struct s17 { short f0 : 13; char f1 : 4; }; argument 74 struct s17 f17(void) {} in f17()
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/external/boringssl/src/crypto/curve25519/ |
D | curve25519.c | 3796 int64_t s17 = 2097151 & (load_4(s + 44) >> 5); in sc_reduce() local 3885 s17 += carry16; in sc_reduce() 3904 s5 += s17 * 666643; in sc_reduce() 3905 s6 += s17 * 470296; in sc_reduce() 3906 s7 += s17 * 654183; in sc_reduce() 3907 s8 -= s17 * 997805; in sc_reduce() 3908 s9 += s17 * 136657; in sc_reduce() 3909 s10 -= s17 * 683901; in sc_reduce() 3910 s17 = 0; in sc_reduce() 4174 int64_t s17; in sc_muladd() local [all …]
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/external/llvm/test/CodeGen/AArch64/ |
D | remat-float0.ll | 15 …~{s6},~{s7},~{s8},~{s9},~{s10},~{s11},~{s12},~{s13},~{s14},~{s15},~{s16},~{s17},~{s18},~{s19},~{s2…
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/external/v8/test/cctest/ |
D | test-assembler-arm64.cc | 5139 __ Fmov(s17, 3.25f); in TEST() 5150 __ Fadd(s0, s17, s18); in TEST() 5196 __ Fmov(s17, 3.25f); in TEST() 5207 __ Fsub(s0, s17, s18); in TEST() 5253 __ Fmov(s17, 3.25f); in TEST() 5265 __ Fmul(s0, s17, s18); in TEST() 5612 __ Fmov(s17, 3.25f); in TEST() 5624 __ Fdiv(s0, s17, s18); in TEST() 5920 __ Fmov(s17, 0.5); in TEST() 5934 __ Fccmp(s16, s17, CFlag, ge); in TEST() [all …]
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D | test-disasm-arm64.cc | 1171 COMPARE(ldp(s17, s18, MemOperand(x19)), "ldp s17, s18, [x19]"); in TEST_() 1219 COMPARE(stp(s17, s18, MemOperand(x19)), "stp s17, s18, [x19]"); in TEST_() 1529 COMPARE(fcvtzu(x16, s17), "fcvtzu x16, s17"); in TEST_()
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/external/valgrind/none/tests/arm/ |
D | vfp.c | 1582 TESTINSN_un_f32("vabs.f32 s18, s17", s18, s17, i32, f2u(INFINITY)); in main() 1604 TESTINSN_un_f32("vneg.f32 s18, s17", s18, s17, i32, f2u(INFINITY)); in main() 1626 TESTINSN_un_f32("vmov.f32 s18, s17", s18, s17, i32, f2u(INFINITY)); in main() 1648 TESTINSN_un_f32("vsqrt.f32 s18, s17", s18, s17, i32, f2u(INFINITY)); in main() 1670 TESTINSN_un_f32("vcvt.s32.f32 s0, s17", s0, s17, i32, f2u(INFINITY)); in main() 1681 TESTINSN_un_f32("vcvt.f32.u32 s10, s17", s10, s17, i32, f2u(1 << 31)); in main() 1695 TESTINSN_un_f32("vcvt.f32.s32 s0, s17", s0, s17, i32, f2u(INFINITY)); in main() 1799 TESTINSN_un_cvt_sd("vcvt.f32.f64 s17, d29", s17, d29, f2u0(-INFINITY), f2u1(-INFINITY)); in main() 1981 TESTINSN_vldr_f32("vldr s17, [r10]", s17, r10, (long) numbers + 8, 0); in main() 2066 TESTINSN_VSTMIAnoWB32("vstmia r10, {s17}", r10, s17, 0xaa45f); in main() [all …]
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D | vfp.stdout.exp | 562 vabs.f32 s18, s17 :: Sd 0x7f800000 Sm (i32)0x7f800000 583 vneg.f32 s18, s17 :: Sd 0xff800000 Sm (i32)0x7f800000 604 vmov.f32 s18, s17 :: Sd 0x7f800000 Sm (i32)0x7f800000 625 vsqrt.f32 s18, s17 :: Sd 0x7f800000 Sm (i32)0x7f800000 646 vcvt.s32.f32 s0, s17 :: Sd 0x7fffffff Sm (i32)0x7f800000 656 vcvt.f32.u32 s10, s17 :: Sd 0x4f4f0000 Sm (i32)0xcf000000 670 vcvt.f32.s32 s0, s17 :: Sd 0x4eff0000 Sm (i32)0x7f800000 979 vstmia r10, {s17} :: Result 0x000aa45f 1007 vstmia r6!, s17; vstmia r6!, s17 :: Result 0x3fa80000 0x3fa80000 1201 s16 0x000542aa s17 0x00addcd5 s18 0x00087acc s18 0x00087acc s19 0x000542aa s20 0x00addcd5
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/external/vixl/test/ |
D | test-assembler-a64.cc | 2850 __ Ldr(s17, MemOperand(x17, x18, UXTW, 2)); in TEST() 9225 __ Fmov(s17, 3.25f); in TEST() 9236 __ Fadd(s0, s17, s18); in TEST() 9281 __ Fmov(s17, 3.25f); in TEST() 9292 __ Fsub(s0, s17, s18); in TEST() 9337 __ Fmov(s17, 3.25f); in TEST() 9349 __ Fmul(s0, s17, s18); in TEST() 9688 __ Fmov(s17, 3.25f); in TEST() 9700 __ Fdiv(s0, s17, s18); in TEST() 9996 __ Fmov(s17, 0.5); in TEST() [all …]
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/external/llvm/test/CodeGen/SPARC/ |
D | 64abi.ll | 88 %s17 = fadd double %d16, %s3 89 ret double %s17
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/external/llvm/test/CodeGen/MIR/ARM/ |
D | ARMLoadStoreDBG.mir | 94 '%s16', '%s17', '%s18', '%s19', '%s20', '%s21',
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D | sched-it-debug-nodes.mir | 105 '%s16', '%s17', '%s18', '%s19', '%s20', '%s21',
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/external/v8/src/arm/ |
D | simulator-arm.h | 120 s16, s17, s18, s19, s20, s21, s22, s23, enumerator
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/external/v8/benchmarks/ |
D | regexp.js | 110 var s17 = computeInputVariants('qvi.so_zrah', 137); 168 s17[i].replace(re11, '');
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