Searched refs:s_load_dwordx8 (Results 1 – 6 of 6) sorted by relevance
| /external/llvm/test/MC/AMDGPU/ |
| D | smrd.s | 46 s_load_dwordx8 s[8:15], s[2:3], 1 label
49 s_load_dwordx8 s[8:15], s[2:3], s4 label
52 s_load_dwordx8 s[96:103], s[2:3], s4 label
|
| D | out-of-range-registers.s | 40 s_load_dwordx8 s[104:111], s[2:3], s4 label
43 s_load_dwordx8 s[100:107], s[2:3], s4 label
46 s_load_dwordx8 s[108:115], s[2:3], s4 label
|
| D | smrd-err.s | 9 s_load_dwordx8 s[96:103], s[2:3], s4 label
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| D | inline-constraints.ll | 11 ; GCN: s_load_dwordx8 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}]
21 …%s256 = tail call <8 x i32> asm sideeffect "s_load_dwordx8 $0, $1", "=s,s"(i32 addrspace(1)* %ptr)
|
| D | kernel-args.ll | 297 ; SI: s_load_dwordx8 s{{\[[0-9]+:[0-9]+\]}}, s[0:1], 0x11
298 ; VI: s_load_dwordx8 s{{\[[0-9]+:[0-9]+\]}}, s[0:1], 0x44
314 ; SI: s_load_dwordx8 s{{\[[0-9]+:[0-9]+\]}}, s[0:1], 0x11
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstructions.td | 70 defm S_LOAD_DWORDX8 : SMRD_Helper <smrd<0x03>, "s_load_dwordx8", SReg_64, SReg_256>;
|