Searched refs:saddlp (Results 1 – 18 of 18) sorted by relevance
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-vadd.ll | 429 ;CHECK: saddlp.4h
431 %tmp3 = call <4 x i16> @llvm.aarch64.neon.saddlp.v4i16.v8i8(<8 x i8> %tmp1)
437 ;CHECK: saddlp.2s
439 %tmp3 = call <2 x i32> @llvm.aarch64.neon.saddlp.v2i32.v4i16(<4 x i16> %tmp1)
445 ;CHECK: saddlp.1d
447 %tmp3 = call <1 x i64> @llvm.aarch64.neon.saddlp.v1i64.v2i32(<2 x i32> %tmp1)
453 ;CHECK: saddlp.8h
455 %tmp3 = call <8 x i16> @llvm.aarch64.neon.saddlp.v8i16.v16i8(<16 x i8> %tmp1)
461 ;CHECK: saddlp.4s
463 %tmp3 = call <4 x i32> @llvm.aarch64.neon.saddlp.v4i32.v8i16(<8 x i16> %tmp1)
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| D | arm64-vaddlv.ll | 5 ; CHECK: saddlp.1d v[[REGNUM:[0-9]+]], v[[INREG:[0-9]+]]
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| /external/llvm/test/MC/AArch64/ |
| D | neon-simd-misc.s | 43 saddlp v3.8h, v21.16b
44 saddlp v8.4h, v5.8b
45 saddlp v9.4s, v1.8h
46 saddlp v0.2s, v1.4h
47 saddlp v12.2d, v4.4s
48 saddlp v17.1d, v28.2s
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| D | neon-diagnostics.s | 5284 saddlp v3.8h, v21.8h
5285 saddlp v8.8b, v5.8b
5286 saddlp v9.8h, v1.4s
5287 saddlp v0.4s, v1.2d
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| D | arm64-advsimd.s | 593 saddlp.4h v0, v0
643 ; CHECK: saddlp.4h v0, v0 ; encoding: [0x00,0x28,0x20,0x0e]
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| /external/libavc/common/armv8/ |
| D | ih264_intra_pred_luma_16x16_av8.s | 450 saddlp v0.2s, v0.4h
454 saddlp v0.1d, v0.2s
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| /external/llvm/include/llvm/IR/ |
| D | IntrinsicsAArch64.td | 285 // FIXME: In theory, we shouldn't need intrinsics for saddlp or
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| /external/vixl/src/vixl/a64/ |
| D | simulator-a64.h | 1677 LogicVRegister saddlp(VectorFormat vform,
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| D | macro-assembler-a64.h | 2297 V(saddlp, Saddlp) \
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| D | assembler-a64.h | 2905 void saddlp(const VRegister& vd,
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| D | simulator-a64.cc | 2460 case NEON_SADDLP: saddlp(vf_lp, rd, rn); break; in VisitNEON2RegMisc()
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| D | logic-a64.cc | 2304 LogicVRegister Simulator::saddlp(VectorFormat vform, in saddlp() function in vixl::Simulator
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| D | assembler-a64.cc | 3998 void Assembler::saddlp(const VRegister& vd, in saddlp() function in vixl::Assembler
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| /external/valgrind/none/tests/arm64/ |
| D | fp_and_simd.stdout.exp | 27400 saddlp v3.1d, v19.2s 9c45dd4334da8b2004135ed7dd92772e 7a4ece083b1326da184da53934137692 00000000…
27401 saddlp v3.2d, v19.4s 6f0de09cdb0fd3c65bc7974fba793952 330c5eaf9acbe865d2485fa876be59b5 ffffffff…
27402 saddlp v3.2s, v19.4h bea2580007020997a00c99f550a2fe85 008f399896b9f1d413ccba7c8a23959f 00000000…
27403 saddlp v3.4s, v19.8h e8e3a44d18958d7436c2c4a900ef26a9 40b7c1a390bfa0073bb91696cf248c31 0000025a…
27404 saddlp v3.4h, v19.8b 4db224646fa7c03d7ac8764b283e109c 536356b0e7bb55deaaefd1d6a59f9e4b 00000000…
27405 saddlp v3.8h, v19.16b 4eed39256b1701d2ce0011ba2b711c3f 9975579efb8e7139c14e4d1c6d7529cd 000efff…
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| /external/vixl/test/ |
| D | test-simulator-a64.cc | 3935 DEFINE_TEST_NEON_2DIFF_LONG(saddlp, Basic) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
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| /external/vixl/doc/ |
| D | supported-instructions.md | 3026 void saddlp(const VRegister& vd,
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-advsimd.txt | 491 # CHECK: saddlp.4h v0, v0
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 2800 defm SADDLP : SIMDLongTwoVector<0, 0b00010, "saddlp", int_aarch64_neon_saddlp>;
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