Searched refs:sarl (Results 1 – 25 of 35) sorted by relevance
12
| /external/compiler-rt/lib/builtins/i386/ |
| D | ashrdi3.S | 59 sarl %cl, %edx // right shift high by count
63 sarl $31, %edx // clear high
64 sarl %cl, %eax // shift low by count - 32
|
| D | moddi3.S | 33 sarl $31, %ecx // (b < 0) ? -1 : 0
44 sarl $31, %ecx // (a < 0) ? -1 : 0
|
| D | divdi3.S | 33 sarl $31, %ecx // (b < 0) ? -1 : 0
45 sarl $31, %ecx // (a < 0) ? -1 : 0
|
| D | floatundisf.S | 86 sarl $31, %eax // (big input) ? -1 : 0
|
| /external/llvm/test/CodeGen/X86/ |
| D | shift-combine.ll | 22 ; CHECK: sarl %
32 ; CHECK: sarl %
42 ; CHECK-NOT: sarl
|
| D | bit-test-shift.ll | 7 ; CHECK: sarl $31, %eax
|
| D | vector-sext.ll | 625 ; X32-SSE41-NEXT: sarl $31, %ecx
629 ; X32-SSE41-NEXT: sarl $31, %eax
778 ; X32-SSE41-NEXT: sarl $31, %ecx
781 ; X32-SSE41-NEXT: sarl $31, %edx
786 ; X32-SSE41-NEXT: sarl $31, %ecx
789 ; X32-SSE41-NEXT: sarl $31, %eax
1226 ; X32-SSE41-NEXT: sarl $31, %ecx
1229 ; X32-SSE41-NEXT: sarl $31, %edx
1234 ; X32-SSE41-NEXT: sarl $31, %ecx
1238 ; X32-SSE41-NEXT: sarl $31, %ecx
[all …]
|
| D | sdiv-exact.ll | 15 ; CHECK: sarl $3
|
| D | bswap.ll | 65 ; CHECK: sarl $16, [[REG]]
69 ; CHECK64: sarl $16, [[REG]]
|
| D | 2008-09-11-CoalescerBug2.ll | 12 ; SOURCE-SCHED: sarl
|
| D | phys_subreg_coalesce-3.ll | 24 ; CHECK: sarl %cl
|
| D | 2007-10-12-SpillerUnfold2.ll | 1 ; RUN: llc < %s -march=x86 -mcpu=corei7 | grep sarl | not grep esp
|
| D | legalize-shift-64.ll | 54 ; CHECK: sarl %cl, %edx
|
| D | divrem8_ext.ll | 92 ; CHECK-32: sarl $31, %edx
|
| D | divide-by-constant.ll | 63 ; CHECK: sarl $18, %eax
|
| D | fast-isel-x86-64.ll | 75 ; CHECK: sarl %cl, %edi
128 ; CHECK: sarl $3,
|
| D | peep-test-4.ll | 25 ; CHECK: sarl %edi
|
| /external/mesa3d/src/mesa/x86/ |
| D | read_rgba_span_x86.S | 102 sarl $2, %eax
208 sarl $2, %eax
369 sarl $2, %eax
532 sarl $2, %ecx
|
| /external/valgrind/VEX/orig_amd64/ |
| D | test1.sorted | 1209 C1F91F sarl $31, %ecx
1210 C1F903 sarl $3, %ecx
1211 C1F805 sarl $5, %eax
1212 C1FA05 sarl $5, %edx
1213 C1F908 sarl $8, %ecx
1214 C1FA08 sarl $8, %edx
1215 D3F8 sarl %cl, %eax
1216 D3FE sarl %cl, %esi
1217 D1F8 sarl %eax
1218 D1FF sarl %edi
|
| D | test1.orig | 4842 sarl $31, %ecx
4846 sarl $3, %ecx
4850 sarl $5, %eax
4854 sarl $5, %edx
4858 sarl $8, %ecx
4862 sarl $8, %edx
4866 sarl %cl, %eax
4870 sarl %cl, %esi
4874 sarl %eax
4878 sarl %edi
|
| D | test2.sorted | 5595 C1F80B sarl $11, %eax
5596 C1F810 sarl $16, %eax
5597 C1F910 sarl $16, %ecx
5598 C1FA10 sarl $16, %edx
5599 C1FF15 sarl $21, %edi
5600 C1F818 sarl $24, %eax
5601 C1FA18 sarl $24, %edx
5602 C1FE18 sarl $24, %esi
5603 C1F802 sarl $2, %eax
5604 C1F803 sarl $3, %eax
[all …]
|
| D | test2.orig | 22382 sarl $11, %eax
22386 sarl $16, %eax
22390 sarl $16, %ecx
22394 sarl $16, %edx
22398 sarl $21, %edi
22402 sarl $24, %eax
22406 sarl $24, %edx
22410 sarl $24, %esi
22414 sarl $2, %eax
22418 sarl $3, %eax
[all …]
|
| /external/llvm/test/MC/X86/ |
| D | x86-32-coverage.s | 1589 sarl $0,0xdeadbeef(%ebx,%ecx,8)
1593 sarl $0,0x45
1597 sarl $0,0x7eed
1601 sarl $0,0xbabecafe
1605 sarl $0,0x12345678
1629 sarl 0xdeadbeef(%ebx,%ecx,8)
1637 sarl 0xbabecafe
1641 sarl 0x12345678
|
| /external/valgrind/none/tests/x86/ |
| D | insn_basic.def | 640 sarl r32.ud[0xff00f0ca] => 0.ud[0xff807865]
641 sarl m32.ud[0xff00f0ca] => 0.ud[0xff807865]
642 sarl imm8[8] r32.ud[0xff00f0ca] => 1.ud[0xffff00f0]
643 sarl imm8[8] m32.ud[0xff00f0ca] => 1.ud[0xffff00f0]
644 sarl cl.ub[8] r32.ud[0xff00f0ca] => 1.ud[0xffff00f0]
645 sarl cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0xffff00f0]
|
| /external/valgrind/none/tests/amd64/ |
| D | insn_basic.def | 851 sarl r32.ud[0xff00f0ca] => 0.ud[0xff807865]
852 sarl m32.ud[0xff00f0ca] => 0.ud[0xff807865]
853 sarl imm8[8] r32.ud[0xff00f0ca] => 1.ud[0xffff00f0]
854 sarl imm8[8] m32.ud[0xff00f0ca] => 1.ud[0xffff00f0]
855 sarl cl.ub[8] r32.ud[0xff00f0ca] => 1.ud[0xffff00f0]
856 sarl cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0xffff00f0]
|
12