Home
last modified time | relevance | path

Searched refs:selnez (Results 1 – 25 of 31) sorted by relevance

12

/external/llvm/test/CodeGen/Mips/
Dcmov.ll21 ; 32-CMP-DAG: selnez $[[T0:[0-9]+]], $[[R1]], $4
36 ; 64-CMP-DAG: selnez $[[T0:[0-9]+]], $[[R1]], $[[CC]]
61 ; 32-CMP-DAG: selnez $[[T0:[0-9]+]], $[[R0]], $4
76 ; 64-CMP-DAG: selnez $[[T0:[0-9]+]], $[[R0]], $[[CC]]
101 ; 32-CMP-DAG: selnez $[[T1:[0-9]+]], $6, $[[CC]]
109 ; 64-CMP-DAG: selnez $[[T1:[0-9]+]], $6, $[[CC]]
131 ; 32-CMP-DAG: selnez $[[T0:[0-9]+]], $5, $[[CC]]
141 ; 64-CMP-DAG: selnez $[[T0:[0-9]+]], $5, $[[CC]]
169 ; 32-CMP-DAG: selnez $[[T2:[0-9]+]], $[[R1]], $[[R0]]
170 ; 32-CMP-DAG: selnez $[[T3:[0-9]+]], $[[R2]], $[[R0]]
[all …]
Dzeroreg.ll41 ; 32R6: selnez $2, $[[R0]], $4
47 ; 64R6: selnez $2, $[[R0]], $4
96 ; 32R6-DAG: selnez $2, $[[R0]], $[[CC]]
97 ; 32R6-DAG: selnez $3, $[[R1]], $[[CC]]
103 ; 64R6: selnez $2, $[[R0]], $4
Dselect.ll22 ; 32R6-DAG: selnez $[[T1:[0-9]+]], $6, $4
32 ; 64R6-DAG: selnez $[[T1:[0-9]+]], $6, $4
60 ; 32R6-DAG: selnez $[[T1:[0-9]+]], $[[F1]], $4
64 ; 32R6-DAG: selnez $[[T1:[0-9]+]], $[[F1H]], $4
78 ; 64R6-DAG: selnez $[[T1:[0-9]+]], $6, $[[CC]]
109 ; 32R6-DAG: selnez $[[T1:[0-9]+]], $[[F1]], $[[T2]]
113 ; 32R6-DAG: selnez $[[T1:[0-9]+]], $[[F1H]], $[[T2]]
123 ; 64R6-DAG: selnez $[[T1:[0-9]+]], $6, $4
521 ; 32R6: selnez $[[NE:[0-9]+]], $4, $[[CCGPR]]
536 ; 64R6: selnez $[[NE:[0-9]+]], $4, $[[CCGPR]]
[all …]
Dcountleading.ll56 ; MIPS32-R6-DAG: selnez $[[R6:[0-9]+]], $[[R1]], $5
80 ; MIPS32-R6-DAG: selnez $[[R5:[0-9]+]], $[[R1]], $[[R4]]
Dmips64-f128.ll632 ; CMP_CC_FMT-DAG: selnez $[[NE1:[0-9]+]], $6, $[[CC]]
635 ; CMP_CC_FMT-DAG: selnez $[[NE2:[0-9]+]], $7, $[[CC]]
661 ; CMP_CC_FMT: selnez $[[NE1:[0-9]+]], $[[R3]], $[[CC]]
664 ; CMP_CC_FMT: selnez $[[NE2:[0-9]+]], $[[R2]], $[[CC]]
/external/llvm/test/CodeGen/Mips/llvm-ir/
Dashr.ll122 ; 32R6: selnez $[[T4:[0-9]+]], $[[T3]], $[[T1]]
130 ; 32R6: selnez $[[T12:[0-9]+]], $[[T0]], $[[T1]]
183 ; 64R6: selnez $[[T6:[0-9]+]], $[[T5]], $[[T3]]
191 ; 64R6: selnez $[[T13:[0-9]+]], $[[T0]], $[[T3]]
Dselect.ll51 ; SEL: selnez $[[T2:[0-9]+]], $5, $[[T0]]
76 ; SEL: selnez $[[T2:[0-9]+]], $5, $[[T0]]
101 ; SEL: selnez $[[T2:[0-9]+]], $5, $[[T0]]
133 ; SEL-32: selnez $[[T1:[0-9]+]], $6, $[[T0]]
137 ; SEL-32: selnez $[[T4:[0-9]+]], $7, $[[T0]]
158 ; SEL-64: selnez $[[T0]], $5, $[[T0]]
Dlshr.ll123 ; 32R6: selnez $[[T8:[0-9]+]], $[[T7]], $[[T5]]
180 ; 64R6: selnez $[[T10:[0-9]+]], $[[T9]], $[[T7]]
Dshl.ll135 ; 32R6: selnez $[[T8:[0-9]+]], $[[T7]], $[[T5]]
192 ; 64R6: selnez $[[T10:[0-9]+]], $[[T9]], $[[T7]]
/external/llvm/test/MC/Mips/micromips32r6/
Dvalid.s77 selnez $2,$3,$4 # CHECK: selnez $2, $3, $4 # encoding: [0x00,0x83,0x11,0x80]
248 selnez.s $f1, $f2, $f3 # CHECK: selnez.s $f1, $f2, $f3 # encoding: [0x54,0x62,0x08,0x78]
249 selnez.d $f2, $f4, $f8 # CHECK: selnez.d $f2, $f4, $f8 # encoding: [0x55,0x04,0x12,0x78]
/external/llvm/test/MC/Mips/micromips64r6/
Dvalid.s145 selnez.s $f1, $f2, $f3 # CHECK: selnez.s $f1, $f2, $f3 # encoding: [0x54,0x62,0x08,0x78]
146 selnez.d $f2, $f4, $f8 # CHECK: selnez.d $f2, $f4, $f8 # encoding: [0x55,0x04,0x12,0x78]
/external/llvm/test/MC/Disassembler/Mips/mips32r6/
Dvalid-mips32r6-el.txt101 0x37 0x10 0x64 0x00 # CHECK: selnez $2, $3, $4
113 0x17 0x10 0x04 0x46 # CHECK: selnez.s $f0, $f2, $f4
114 0x17 0x10 0x24 0x46 # CHECK: selnez.d $f0, $f2, $f4
Dvalid-mips32r6.txt10 0x00 0x64 0x10 0x37 # CHECK: selnez $2, $3, $4
79 0x46 0x04 0x10 0x17 # CHECK: selnez.s $f0, $f2, $f4
90 0x46 0x24 0x10 0x17 # CHECK: selnez.d $f0, $f2, $f4
/external/llvm/test/MC/Disassembler/Mips/mips64r6/
Dvalid-mips64r6-el.txt154 0x37 0x10 0x64 0x00 # CHECK: selnez $2, $3, $4
155 0x17 0x10 0x24 0x46 # CHECK: selnez.d $f0, $f2, $f4
156 0x17 0x10 0x04 0x46 # CHECK: selnez.s $f0, $f2, $f4
Dvalid-mips64r6.txt12 0x00 0x64 0x10 0x37 # CHECK: selnez $2, $3, $4
98 0x46 0x04 0x10 0x17 # CHECK: selnez.s $f0, $f2, $f4
109 0x46 0x24 0x10 0x17 # CHECK: selnez.d $f0, $f2, $f4
/external/llvm/test/MC/Disassembler/Mips/micromips32r6/
Dvalid.txt80 0x00 0x83 0x11 0x80 # CHECK: selnez $2, $3, $4
253 0x54 0x62 0x08 0x78 # CHECK: selnez.s $f1, $f2, $f3
254 0x55 0x04 0x12 0x78 # CHECK: selnez.d $f2, $f4, $f8
/external/llvm/test/MC/Disassembler/Mips/micromips64r6/
Dvalid.txt165 0x54 0x62 0x08 0x78 # CHECK: selnez.s $f1, $f2, $f3
166 0x55 0x04 0x12 0x78 # CHECK: selnez.d $f2, $f4, $f8
/external/v8/test/cctest/
Dtest-disasm-mips64.cc814 COMPARE(selnez(a0, a1, a2), "00a62037 selnez a0, a1, a2"); in TEST()
818 COMPARE(selnez(D, f3, f4, f5), "462520d7 selnez.d f3, f4, f5"); in TEST()
820 COMPARE(selnez(S, f3, f4, f5), "460520d7 selnez.s f3, f4, f5"); in TEST()
/external/v8/src/compiler/mips64/
Dcode-generator-mips64.cc671 __ selnez(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); in AssembleArchInstruction() local
679 __ selnez(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); in AssembleArchInstruction() local
696 __ selnez(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); in AssembleArchInstruction() local
704 __ selnez(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); in AssembleArchInstruction() local
/external/llvm/lib/Target/Mips/
DMips32r6InstrInfo.td500 class SELNEZ_DESC : SELEQNE_Z_DESC_BASE<"selnez", GPR32Opnd>;
541 class SELNEZ_S_DESC : SELEQNEZ_DESC_BASE<"selnez.s", FGR32Opnd>;
542 class SELNEZ_D_DESC : SELEQNEZ_DESC_BASE<"selnez.d", FGR64Opnd>;
DMips64r6InstrInfo.td76 class SELNEZ64_DESC : SELEQNE_Z_DESC_BASE<"selnez", GPR64Opnd>;
DMicroMips32r6InstrInfo.td488 class SELNEZ_MMR6_DESC : SELEQNE_Z_MMR6_DESC_BASE<"selnez", GPR32Opnd>;
772 class SELENZ_S_MMR6_DESC : SELEQNEZ_DESC_BASE<"selnez.s", FGR32Opnd>;
773 class SELENZ_D_MMR6_DESC : SELEQNEZ_DESC_BASE<"selnez.d", FGR64Opnd>;
/external/llvm/test/MC/Mips/
Dtarget-soft-float.s169 selnez.d $f2, $f2, $f2
171 selnez.s $f2, $f2, $f2
/external/v8/src/mips/
Dassembler-mips.cc2252 void Assembler::selnez(Register rd, Register rs, Register rt) { in selnez() function in v8::internal::Assembler
2258 void Assembler::selnez(SecondaryField fmt, FPURegister fd, FPURegister fs, in selnez() function in v8::internal::Assembler
2277 selnez(D, fd, fs, ft); in selnez_d()
2282 selnez(S, fd, fs, ft); in selnez_s()
Dassembler-mips.h820 void selnez(Register rd, Register rs, Register rt);
821 void selnez(SecondaryField fmt, FPURegister fd, FPURegister fs,

12