Home
last modified time | relevance | path

Searched refs:setOpcode (Results 1 – 25 of 69) sorted by relevance

123

/external/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCDuplexInfo.cpp702 Result.setOpcode(Hexagon::V4_SA1_inc); in deriveSubInst()
708 Result.setOpcode(Hexagon::V4_SA1_dec); in deriveSubInst()
714 Result.setOpcode(Hexagon::V4_SA1_addsp); in deriveSubInst()
720 Result.setOpcode(Hexagon::V4_SA1_addi); in deriveSubInst()
727 Result.setOpcode(Hexagon::V4_SA1_addrx); in deriveSubInst()
733 Result.setOpcode(Hexagon::V4_SS2_allocframe); in deriveSubInst()
738 Result.setOpcode(Hexagon::V4_SA1_zxtb); in deriveSubInst()
743 Result.setOpcode(Hexagon::V4_SA1_and1); in deriveSubInst()
749 Result.setOpcode(Hexagon::V4_SA1_cmpeqi); in deriveSubInst()
758 Result.setOpcode(Hexagon::V4_SA1_combine1i); in deriveSubInst()
[all …]
DHexagonMCCompound.cpp220 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
233 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
247 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
260 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
273 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
291 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
310 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
322 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
333 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
/external/llvm/lib/Target/Hexagon/
DHexagonAsmPrinter.cpp279 TmpInst.setOpcode(Hexagon::L2_loadrdgp); in HexagonProcessInstruction()
298 TmpInst.setOpcode(Hexagon::L2_loadrigp); in HexagonProcessInstruction()
311 MappedInst.setOpcode(Hexagon::C2_or); in HexagonProcessInstruction()
324 MappedInst.setOpcode(Hexagon::M2_vrcmpys_acc_s1_h); in HexagonProcessInstruction()
326 MappedInst.setOpcode(Hexagon::M2_vrcmpys_acc_s1_l); in HexagonProcessInstruction()
335 MappedInst.setOpcode(Hexagon::M2_vrcmpys_s1_h); in HexagonProcessInstruction()
337 MappedInst.setOpcode(Hexagon::M2_vrcmpys_s1_l); in HexagonProcessInstruction()
347 MappedInst.setOpcode(Hexagon::M2_vrcmpys_s1rp_h); in HexagonProcessInstruction()
349 MappedInst.setOpcode(Hexagon::M2_vrcmpys_s1rp_l); in HexagonProcessInstruction()
359 MappedInst.setOpcode(Hexagon::A4_boundscheck_hi); in HexagonProcessInstruction()
[all …]
/external/llvm/lib/Target/X86/
DX86MCInstLower.cpp315 Inst.setOpcode(Opcode); in SimplifyShortImmForm()
343 Inst.setOpcode(NewOpcode); in SimplifyMOVSX()
394 Inst.setOpcode(Opcode); in SimplifyShortMoveForm()
437 OutMI.setOpcode(MI->getOpcode()); in Lower()
458 OutMI.setOpcode(X86::MOV32ri); in Lower()
495 OutMI.setOpcode(NewOpc); in Lower()
509 OutMI.setOpcode(NewOpc); in Lower()
524 OutMI.setOpcode(Opcode); in Lower()
532 OutMI.setOpcode(getRetOpcode(AsmPrinter.getSubtarget())); in Lower()
539 OutMI.setOpcode(getRetOpcode(AsmPrinter.getSubtarget())); in Lower()
[all …]
/external/llvm/lib/Target/XCore/Disassembler/
DXCoreDisassembler.cpp281 Inst.setOpcode(XCore::STW_2rus); in Decode2OpInstructionFail()
284 Inst.setOpcode(XCore::LDW_2rus); in Decode2OpInstructionFail()
287 Inst.setOpcode(XCore::ADD_3r); in Decode2OpInstructionFail()
290 Inst.setOpcode(XCore::SUB_3r); in Decode2OpInstructionFail()
293 Inst.setOpcode(XCore::SHL_3r); in Decode2OpInstructionFail()
296 Inst.setOpcode(XCore::SHR_3r); in Decode2OpInstructionFail()
299 Inst.setOpcode(XCore::EQ_3r); in Decode2OpInstructionFail()
302 Inst.setOpcode(XCore::AND_3r); in Decode2OpInstructionFail()
305 Inst.setOpcode(XCore::OR_3r); in Decode2OpInstructionFail()
308 Inst.setOpcode(XCore::LDW_3r); in Decode2OpInstructionFail()
[all …]
/external/llvm/lib/Target/Hexagon/AsmParser/
DHexagonAsmParser.cpp758 NewInst.setOpcode(MCI.getOpcode()); in canonicalizeImmediates()
1464 TmpInst.setOpcode(opCode); in makeCombineInst()
1560 Inst.setOpcode(Hexagon::C2_cmpgti); in processInstruction()
1574 TmpInst.setOpcode(Hexagon::C2_cmpeq); in processInstruction()
1582 Inst.setOpcode(Hexagon::C2_cmpgtui); in processInstruction()
1623 Inst.setOpcode(Hexagon::A2_combinew); in processInstruction()
1638 Inst.setOpcode((Inst.getOpcode() == Hexagon::A2_tfrpt) in processInstruction()
1654 Inst.setOpcode((Inst.getOpcode() == Hexagon::A2_tfrptnew) in processInstruction()
1758 TmpInst.setOpcode(Hexagon::L2_loadrigp); in processInstruction()
1760 TmpInst.setOpcode(Hexagon::L2_loadrdgp); in processInstruction()
[all …]
/external/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp1866 Inst.setOpcode(ARM::RFEDA); in DecodeMemMultipleWritebackInstruction()
1869 Inst.setOpcode(ARM::RFEDA_UPD); in DecodeMemMultipleWritebackInstruction()
1872 Inst.setOpcode(ARM::RFEDB); in DecodeMemMultipleWritebackInstruction()
1875 Inst.setOpcode(ARM::RFEDB_UPD); in DecodeMemMultipleWritebackInstruction()
1878 Inst.setOpcode(ARM::RFEIA); in DecodeMemMultipleWritebackInstruction()
1881 Inst.setOpcode(ARM::RFEIA_UPD); in DecodeMemMultipleWritebackInstruction()
1884 Inst.setOpcode(ARM::RFEIB); in DecodeMemMultipleWritebackInstruction()
1887 Inst.setOpcode(ARM::RFEIB_UPD); in DecodeMemMultipleWritebackInstruction()
1890 Inst.setOpcode(ARM::SRSDA); in DecodeMemMultipleWritebackInstruction()
1893 Inst.setOpcode(ARM::SRSDA_UPD); in DecodeMemMultipleWritebackInstruction()
[all …]
/external/owasp/sanitizer/tools/findbugs/lib/
Dasm-tree-3.3.jarMETA-INF/MANIFEST.MF org/objectweb/asm/tree/AbstractInsnNode.class < ...
/external/llvm/lib/Target/AArch64/
DAArch64AsmPrinter.cpp469 TmpInst.setOpcode(AArch64::BR); in EmitInstruction()
478 TmpInst.setOpcode(AArch64::B); in EmitInstruction()
502 Adrp.setOpcode(AArch64::ADRP); in EmitInstruction()
508 Ldr.setOpcode(AArch64::LDRXui); in EmitInstruction()
516 Add.setOpcode(AArch64::ADDXri); in EmitInstruction()
526 TLSDescCall.setOpcode(AArch64::TLSDESCCALL); in EmitInstruction()
531 Blr.setOpcode(AArch64::BLR); in EmitInstruction()
/external/llvm/lib/Target/PowerPC/AsmParser/
DPPCAsmParser.cpp835 TmpInst.setOpcode((Opcode == PPC::DCBTx || Opcode == PPC::DCBTT) ? in ProcessInstruction()
847 TmpInst.setOpcode(PPC::DCBT); in ProcessInstruction()
857 TmpInst.setOpcode(PPC::DCBTST); in ProcessInstruction()
866 TmpInst.setOpcode(PPC::LA); in ProcessInstruction()
875 TmpInst.setOpcode(PPC::ADDI); in ProcessInstruction()
884 TmpInst.setOpcode(PPC::ADDIS); in ProcessInstruction()
893 TmpInst.setOpcode(PPC::ADDIC); in ProcessInstruction()
902 TmpInst.setOpcode(PPC::ADDICo); in ProcessInstruction()
914 TmpInst.setOpcode(Opcode == PPC::EXTLWI? PPC::RLWINM : PPC::RLWINMo); in ProcessInstruction()
928 TmpInst.setOpcode(Opcode == PPC::EXTRWI? PPC::RLWINM : PPC::RLWINMo); in ProcessInstruction()
[all …]
/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsTargetStreamer.cpp761 TmpInst.setOpcode(Mips::LUi); in emitDirectiveCpLoad()
770 TmpInst.setOpcode(Mips::ADDiu); in emitDirectiveCpLoad()
780 TmpInst.setOpcode(Mips::ADDu); in emitDirectiveCpLoad()
821 Inst.setOpcode(Mips::OR64); in emitDirectiveCpsetup()
827 Inst.setOpcode(Mips::SD); in emitDirectiveCpsetup()
841 Inst.setOpcode(Mips::LUi); in emitDirectiveCpsetup()
848 Inst.setOpcode(Mips::ADDiu); in emitDirectiveCpsetup()
856 Inst.setOpcode(Mips::DADDu); in emitDirectiveCpsetup()
874 Inst.setOpcode(Mips::OR); in emitDirectiveCpreturn()
879 Inst.setOpcode(Mips::LD); in emitDirectiveCpreturn()
DMipsMCCodeEmitter.cpp70 Inst.setOpcode(Mips::DSLL32); in LowerLargeShift()
73 Inst.setOpcode(Mips::DSRL32); in LowerLargeShift()
76 Inst.setOpcode(Mips::DSRA32); in LowerLargeShift()
79 Inst.setOpcode(Mips::DROTR32); in LowerLargeShift()
105 InstIn.setOpcode((Opcode == Mips::DEXT) ? Mips::DEXTU : Mips::DINSU); in LowerDextDins()
111 InstIn.setOpcode((Opcode == Mips::DEXT) ? Mips::DEXTM : Mips::DINSM); in LowerDextDins()
202 TmpInst.setOpcode (NewOpcode); in encodeInstruction()
/external/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp4652 case ARM::tBcc: Inst.setOpcode(ARM::tB); break; in cvtThumbBranches()
4653 case ARM::t2Bcc: Inst.setOpcode(ARM::t2B); break; in cvtThumbBranches()
4662 Inst.setOpcode(Cond == ARMCC::AL ? ARM::tB : ARM::tBcc); in cvtThumbBranches()
4666 Inst.setOpcode(Cond == ARMCC::AL ? ARM::t2B : ARM::t2Bcc); in cvtThumbBranches()
4677 Inst.setOpcode(ARM::t2B); in cvtThumbBranches()
4684 Inst.setOpcode(ARM::t2Bcc); in cvtThumbBranches()
6680 TmpInst.setOpcode(Opcode); in processInstruction()
6698 TmpInst.setOpcode(Opcode); in processInstruction()
6716 TmpInst.setOpcode(ARM::ADR); in processInstruction()
6753 Inst.setOpcode(ARM::tLDRpci); in processInstruction()
[all …]
/external/llvm/lib/Target/Mips/Disassembler/
DMipsDisassembler.cpp570 MI.setOpcode(Mips::BOVC); in DecodeAddiGroupBranch()
573 MI.setOpcode(Mips::BEQC); in DecodeAddiGroupBranch()
576 MI.setOpcode(Mips::BEQZALC); in DecodeAddiGroupBranch()
609 MI.setOpcode(Mips::BNVC); in DecodeDaddiGroupBranch()
612 MI.setOpcode(Mips::BNEC); in DecodeDaddiGroupBranch()
615 MI.setOpcode(Mips::BNEZALC); in DecodeDaddiGroupBranch()
651 MI.setOpcode(Mips::BLEZC); in DecodeBlezlGroupBranch()
653 MI.setOpcode(Mips::BGEZC); in DecodeBlezlGroupBranch()
656 MI.setOpcode(Mips::BGEC); in DecodeBlezlGroupBranch()
695 MI.setOpcode(Mips::BGTZC); in DecodeBgtzlGroupBranch()
[all …]
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyAsmPrinter.cpp151 Param.setOpcode(WebAssembly::PARAM); in EmitFunctionBodyStart()
164 Result.setOpcode(WebAssembly::RESULT); in EmitFunctionBodyStart()
171 Local.setOpcode(WebAssembly::LOCAL); in EmitFunctionBodyStart()
/external/llvm/lib/Target/Mips/
DMipsMCInstLower.cpp173 OutMI.setOpcode(Mips::LUi); in lowerLongBranchLUi()
187 OutMI.setOpcode(Opcode); in lowerLongBranchADDiu()
230 OutMI.setOpcode(MI->getOpcode()); in Lower()
DMipsAsmPrinter.cpp105 TmpInst0.setOpcode(Mips::JALR64); in emitPseudoIndirectBranch()
109 TmpInst0.setOpcode(Mips::JALR); in emitPseudoIndirectBranch()
113 TmpInst0.setOpcode(Mips::JR_MM); in emitPseudoIndirectBranch()
116 TmpInst0.setOpcode(Mips::JR); in emitPseudoIndirectBranch()
776 I.setOpcode(Mips::JAL); in EmitJal()
785 I.setOpcode(Opcode); in EmitInstrReg()
804 I.setOpcode(Opcode); in EmitInstrRegReg()
814 I.setOpcode(Opcode); in EmitInstrRegRegReg()
/external/llvm/lib/Target/ARM/
DARMInstrInfo.cpp38 NopInst.setOpcode(ARM::HINT); in getNoopForMachoTarget()
43 NopInst.setOpcode(ARM::MOVr); in getNoopForMachoTarget()
/external/mockito/cglib-and-asm/src/org/mockito/asm/tree/
DVarInsnNode.java72 public void setOpcode(final int opcode) { in setOpcode() method in VarInsnNode
DIntInsnNode.java66 public void setOpcode(final int opcode) { in setOpcode() method in IntInsnNode
DTypeInsnNode.java69 public void setOpcode(final int opcode) { in setOpcode() method in TypeInsnNode
DJumpInsnNode.java74 public void setOpcode(final int opcode) { in setOpcode() method in JumpInsnNode
DMethodInsnNode.java89 public void setOpcode(final int opcode) { in setOpcode() method in MethodInsnNode
DFieldInsnNode.java88 public void setOpcode(final int opcode) { in setOpcode() method in FieldInsnNode
/external/llvm/include/llvm/MC/
DMCInstBuilder.h28 Inst.setOpcode(Opcode); in MCInstBuilder()

123