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Searched refs:sha1h (Results 1 – 15 of 15) sorted by relevance

/external/llvm/test/MC/AArch64/
Darm64-crypto.s16 sha1h s0, s1
32 ; CHECK: sha1h s0, s1 ; encoding: [0x20,0x08,0x28,0x5e]
53 sha1h s30, s0
64 ; CHECK: sha1h s30, s0 ; encoding: [0x1e,0x08,0x28,0x5e]
Dneon-crypto.s22 sha1h s0, s1
Dneon-diagnostics.s6339 sha1h b0, b1
6340 sha1h h0, h1
6341 sha1h d0, d1 define
6342 sha1h q0, q1
/external/llvm/test/MC/ARM/
Dthumb-neon-crypto.s12 sha1h.32 q0, q1
13 @ CHECK: sha1h.32 q0, q1 @ encoding: [0xb9,0xff,0xc2,0x02]
Dneon-crypto.s17 sha1h.32 q0, q1
20 @ CHECK: sha1h.32 q0, q1 @ encoding: [0xc2,0x02,0xb9,0xf3]
Ddirective-arch_extension-crypto.s31 sha1h.32 q0, q1
77 sha1h.32 q0, q1
Dthumb-invalid-crypto.txt15 @ CHECK: error: instruction 'sha1h' is not predicable, but condition code specified
Dinvalid-neon-v8.s39 sha1h.32 d0, q1
/external/llvm/test/CodeGen/ARM/
Dintrinsics-crypto.ll22 %resscalar = call i32 @llvm.arm.neon.sha1h(i32 %scalar)
24 ; CHECK: sha1h.32 q{{[0-9]+}}, q{{[0-9]+}}
50 declare i32 @llvm.arm.neon.sha1h(i32)
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-crypto.txt30 # CHECK: sha1h s0, s1
45 # CHECK-APPLE: sha1h s0, s1
/external/boringssl/linux-arm/crypto/sha/
Dsha1-armv4-large.S1354 .byte 0xc0,0x62,0xb9,0xf3 @ sha1h q3,q0 @ 0
1358 .byte 0xc0,0x42,0xb9,0xf3 @ sha1h q2,q0 @ 1
1363 .byte 0xc0,0x62,0xb9,0xf3 @ sha1h q3,q0 @ 2
1368 .byte 0xc0,0x42,0xb9,0xf3 @ sha1h q2,q0 @ 3
1373 .byte 0xc0,0x62,0xb9,0xf3 @ sha1h q3,q0 @ 4
1378 .byte 0xc0,0x42,0xb9,0xf3 @ sha1h q2,q0 @ 5
1383 .byte 0xc0,0x62,0xb9,0xf3 @ sha1h q3,q0 @ 6
1388 .byte 0xc0,0x42,0xb9,0xf3 @ sha1h q2,q0 @ 7
1393 .byte 0xc0,0x62,0xb9,0xf3 @ sha1h q3,q0 @ 8
1398 .byte 0xc0,0x42,0xb9,0xf3 @ sha1h q2,q0 @ 9
[all …]
/external/llvm/test/CodeGen/AArch64/
Darm64-crypto.ll39 declare i32 @llvm.aarch64.crypto.sha1h(i32 %hash_e)
83 ; CHECK: sha1h [[RES:s[0-9]+]], [[HASH_E]]
85 %res = call i32 @llvm.aarch64.crypto.sha1h(i32 %hash_e)
/external/llvm/test/MC/Disassembler/ARM/
Dneon-crypto.txt13 # CHECK: sha1h.32 q0, q1
Dthumb-neon-crypto.txt13 # CHECK: sha1h.32 q0, q1
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td5188 def SHA1Hrr : SHAInstSS< 0b0000, "sha1h", int_aarch64_crypto_sha1h>;