| /external/llvm/test/MC/AArch64/ |
| D | neon-max-min-pairwise.s | 8 smaxp v0.8b, v1.8b, v2.8b
9 smaxp v0.16b, v1.16b, v2.16b
10 smaxp v0.4h, v1.4h, v2.4h
11 smaxp v0.8h, v1.8h, v2.8h
12 smaxp v0.2s, v1.2s, v2.2s
13 smaxp v0.4s, v1.4s, v2.4s
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| D | arm64-advsimd.s | 342 smaxp.8b v0, v0, v0
413 ; CHECK: smaxp.8b v0, v0, v0 ; encoding: [0x00,0xa4,0x20,0x0e]
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| D | neon-diagnostics.s | 1132 smaxp v0.2d, v1.2d, v2.2d
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-vmax.ll | 251 ;CHECK: smaxp.8b
254 %tmp3 = call <8 x i8> @llvm.aarch64.neon.smaxp.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
260 ;CHECK: smaxp.16b
263 %tmp3 = call <16 x i8> @llvm.aarch64.neon.smaxp.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
269 ;CHECK: smaxp.4h
272 %tmp3 = call <4 x i16> @llvm.aarch64.neon.smaxp.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
278 ;CHECK: smaxp.8h
281 %tmp3 = call <8 x i16> @llvm.aarch64.neon.smaxp.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
287 ;CHECK: smaxp.2s
290 %tmp3 = call <2 x i32> @llvm.aarch64.neon.smaxp.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
[all …]
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| D | arm64-smaxv.ll | 28 ; CHECK: smaxp.2s v[[REGNUM:[0-9]+]], v0, v0
94 ; CHECK: smaxp.2s v[[REGNUM:[0-9]+]], v1, v1
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| /external/valgrind/none/tests/arm64/ |
| D | fp_and_simd.c | 3404 GEN_BINARY_TEST(smaxp, 4s, 4s, 4s)
3405 GEN_BINARY_TEST(smaxp, 2s, 2s, 2s)
3406 GEN_BINARY_TEST(smaxp, 8h, 8h, 8h)
3407 GEN_BINARY_TEST(smaxp, 4h, 4h, 4h)
3408 GEN_BINARY_TEST(smaxp, 16b, 16b, 16b)
3409 GEN_BINARY_TEST(smaxp, 8b, 8b, 8b)
|
| D | fp_and_simd.stdout.exp | 27574 smaxp v9.4s, v7.4s, v8.4s 3569055230026193ab5e47ef15d99fb0 1fe35c511841515c9a67574c25e620cd 1fe3…
27576 smaxp v9.2s, v7.2s, v8.2s 2869b6449e2f556a54ad6360c54808fd 9b33151e60ac142612cb5a201a8bbba7 0000…
27577 smaxp v9.8h, v7.8h, v8.8h 7e8cf8fe5578255561a6c8ba989b70d7 8c1b28c4266645b47819c64ee7d1697e 28c4…
27578 smaxp v9.4h, v7.4h, v8.4h 172fc2ce3fbe7be0496a4baa58612503 26b4c63aea387c6336670dba7bea73b9 0000…
27579 smaxp v9.16b, v7.16b, v8.16b 18408f4fc57a689eea69f25e72061db2 cd86305f99927d4c23cd90798706430e c…
27580 smaxp v9.8b, v7.8b, v8.8b 91c0dd1df186a245c3d627245f94fc4b b23304715af01dc6de1cdb7aa4d09b84 0000…
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | neon-instructions.txt | 567 # CHECK: smaxp v1.8b, v15.8b, v22.8b
569 # CHECK: smaxp v3.4h, v13.4h, v24.4h
571 # CHECK: smaxp v5.2s, v11.2s, v26.2s
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| D | arm64-advsimd.txt | 325 # CHECK: smaxp.8b v0, v0, v0
|
| /external/vixl/src/vixl/a64/ |
| D | simulator-a64.h | 1746 LogicVRegister smaxp(VectorFormat vform,
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| D | macro-assembler-a64.h | 2168 V(smaxp, Smaxp) \
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| D | assembler-a64.h | 3002 void smaxp(const VRegister& vd,
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| D | simulator-a64.cc | 2634 case NEON_SMAXP: smaxp(vf, rd, rn, rm); break; in VisitNEON3Same()
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| D | logic-a64.cc | 1368 LogicVRegister Simulator::smaxp(VectorFormat vform, in smaxp() function in vixl::Simulator
|
| D | assembler-a64.cc | 3225 V(smaxp, NEON_SMAXP, vd.IsVector() && !vd.IsLaneSizeD()) \
|
| /external/vixl/test/ |
| D | test-simulator-a64.cc | 3730 DEFINE_TEST_NEON_3SAME_NO2D(smaxp, Basic)
|
| /external/vixl/doc/ |
| D | supported-instructions.md | 3155 void smaxp(const VRegister& vd,
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 2912 defm SMAXP : SIMDThreeSameVectorBHS<0,0b10100,"smaxp", int_aarch64_neon_smaxp>;
|