| /external/llvm/test/MC/AArch64/ |
| D | neon-simd-copy.s | 33 smov w1, v0.b[15]
34 smov w14, v6.h[4]
35 smov x1, v0.b[15]
36 smov x14, v6.h[4]
37 smov x20, v9.s[2]
|
| D | neon-diagnostics.s | 4342 smov w1, v0.b[16]
4343 smov w14, v6.h[8]
4344 smov x1, v0.b[16]
4345 smov x14, v6.h[8]
4346 smov x20, v9.s[5]
4347 smov w1, v0.d[0]
4348 smov w14, v6.d[1]
4349 smov x1, v0.d[0]
4350 smov x14, v6.d[1]
4351 smov x20, v9.d[0]
|
| D | arm64-advsimd.s | 187 smov.s x3, v2[2]
188 smov x3, v2.s[2]
194 ; CHECK: smov.s x3, v2[2] ; encoding: [0x43,0x2c,0x14,0x4e]
195 ; CHECK: smov.s x3, v2[2] ; encoding: [0x43,0x2c,0x14,0x4e]
|
| /external/libmpeg2/common/armv8/ |
| D | ideint_spatial_filter_av8.s | 147 smov x5, v16.2s[0]
148 smov x6, v18.2s[0]
149 smov x7, v20.2s[0]
175 smov x5, v16.2s[1]
176 smov x6, v18.2s[1]
177 smov x7, v20.2s[1]
|
| D | icv_variance_av8.s | 103 smov x0, v4.4h[0]
106 smov x1, v20.2s[0]
|
| D | icv_sad_av8.s | 98 smov x0, v0.8h[0]
|
| D | ideint_cac_av8.s | 221 smov x0, v0.2s[0]
|
| /external/libhevc/common/arm64/ |
| D | ihevc_intra_pred_chroma_dc.s | 183 smov x1, v18.s[0]
184 smov x11, v17.s[0]
277 smov x10, v17.s[0]
278 smov x11, v18.s[0]
|
| D | ihevc_intra_pred_filters_chroma_mode_19_to_25.s | 262 smov x14, v5.s[0] //(i row)extract idx to the r register
308 smov x14, v5.s[1] //extract idx to the r register
389 smov x14, v3.s[0] //(i)extract idx to the r register
431 smov x14, v3.s[1] //extract idx to the r register
504 smov x14, v3.s[0] //(i)extract idx to the r register
|
| D | ihevc_intra_pred_chroma_mode_27_to_33.s | 148 smov x14, v5.s[0] //(i row)extract idx to the r register
197 smov x14, v5.s[1] //extract idx to the r register
277 smov x14, v3.s[0] //(i)extract idx to the r register
317 smov x14, v3.s[1] //extract idx to the r register
388 smov x14, v3.s[0] //(i)extract idx to the r register
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-smaxv.ll | 6 ; CHECK-NEXT: smov.b w0, v[[REGNUM]][0]
17 ; CHECK-NEXT: smov.h w0, v[[REGNUM]][0]
39 ; CHECK-NEXT: smov.b w0, v[[REGNUM]][0]
50 ; CHECK-NEXT: smov.h w0, v[[REGNUM]][0]
|
| D | arm64-sminv.ll | 6 ; CHECK-NEXT: smov.b w0, v[[REGNUM]][0]
17 ; CHECK-NEXT: smov.h w0, v[[REGNUM]][0]
39 ; CHECK-NEXT: smov.b w0, v[[REGNUM]][0]
50 ; CHECK-NEXT: smov.h w0, v[[REGNUM]][0]
|
| D | arm64-vaddv.ll | 6 ; CHECK-NEXT: smov.b w0, v[[REGNUM]][0]
29 ; CHECK-NEXT: smov.h w0, v[[REGNUM]][0]
246 ; CHECK-NEXT: smov.b w0, v[[REGNUM]][0]
269 ; CHECK-NEXT: smov.h w0, v[[REGNUM]][0]
|
| D | arm64-neon-copy.ll | 307 ; CHECK: smov {{w[0-9]+}}, {{v[0-9]+}}.b[8]
316 ; CHECK: smov {{w[0-9]+}}, {{v[0-9]+}}.h[2]
325 ; CHECK: smov {{x[0-9]+}}, {{v[0-9]+}}.b[8]
333 ; CHECK: smov {{x[0-9]+}}, {{v[0-9]+}}.h[2]
341 ; CHECK: smov {{x[0-9]+}}, {{v[0-9]+}}.s[2]
349 ; CHECK: smov {{w[0-9]+}}, {{v[0-9]+}}.b[4]
358 ; CHECK: smov {{w[0-9]+}}, {{v[0-9]+}}.h[2]
367 ; CHECK: smov {{[xw][0-9]+}}, {{v[0-9]+}}.b[6]
375 ; CHECK: smov {{[xw][0-9]+}}, {{v[0-9]+}}.h[2]
383 ; CHECK: smov {{x[0-9]+}}, {{v[0-9]+}}.s[1]
|
| /external/libavc/encoder/armv8/ |
| D | ih264e_evaluate_intra_chroma_modes_av8.s | 345 smov x8, v16.s[0]
355 smov x9, v26.s[0]
364 smov x10, v24.s[0] //dc
|
| D | ih264e_evaluate_intra16x16_modes_av8.s | 446 smov x8, v16.s[0] //dc
456 smov x9, v26.s[0]
465 smov x10, v24.s[0] //dc
|
| /external/valgrind/none/tests/arm64/ |
| D | fp_and_simd.stdout.exp | 27894 smov x9, v10.s[0] 3cbbbf44727530dbcc91b130a66f72db 59b24adac4039bf924d9590c81e91d32 3cbbbf44727…
27895 smov x9, v10.s[3] 204da9fcefe0487f662f0c4e5cbb90d4 9c5c2ab2d3f3f7355b9f5fb336bae49c 204da9fcefe…
27896 smov x9, v10.h[0] 6734af0759117617d8e5d8e23351d8a5 db53fe14e821c21d0176ad07254f2e96 6734af07591…
27897 smov x9, v10.h[7] 767727e0626e5b90773ea4e9ad865aff 5e870fbaa84ac7ada8fefd06263995fe 767727e0626…
27898 smov w9, v10.h[0] cca804f6a1ba22701cd8a33a2f40c8b9 823720650721303b9867259575bf4b7e cca804f6a1b…
27900 smov w9, v10.h[7] 3dc6f53506e5789b51210ad8095cd9a3 59cb1e72a44f81ccb0788ea9351ffbe7 3dc6f53506e…
27901 smov x9, v10.b[0] 2ab05b7ff0cfbcf275fc3aa39dbcec9c 432368c1dfb317414e129724c73b0617 2ab05b7ff0c…
27902 smov x9, v10.b[15] f14895b2bf584e55e848937d4b3f6186 a1215e31162f547ad415a0e48af1cbf0 f14895b2bf…
27903 smov w9, v10.b[0] f56c03afd45f8fa40be5734572c4993f d2a460a4aca19857a2610acade22aa50 f56c03afd45…
27904 smov w9, v10.b[15] 93fe06568ec6debf3db23cda722cf3a8 378bcff8feea42b817d534b623ae0418 93fe06568e…
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-advsimd.txt | 125 # CHECK: smov.s x3, v2[2]
126 # CHECK: smov.s x3, v2[2]
|
| /external/vixl/src/vixl/a64/ |
| D | macro-assembler-a64.h | 2812 smov(rd, vn, vn_index); in Smov()
|
| D | assembler-a64.h | 2776 void smov(const Register& rd,
|
| D | assembler-a64.cc | 3891 void Assembler::smov(const Register& rd, in smov() function in vixl::Assembler
|
| /external/vixl/doc/ |
| D | supported-instructions.md | 3274 void smov(const Register& rd,
|
| /external/valgrind/perf/ |
| D | tinycc.c | 3103 DEF_BWL(smov)
4435 DEF_BWL(smov)
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 4081 // If there is a sign extension after this intrinsic, consume it as smov already
|
| D | AArch64InstrFormats.td | 6174 : BaseSIMDMov<Q, size, 0b0101, regtype, idxtype, "smov", []>;
|