Home
last modified time | relevance | path

Searched refs:smull2 (Results 1 – 19 of 19) sorted by relevance

/external/libavc/common/armv8/
Dih264_iquant_itrans_recon_av8.s555 smull2 v17.4s, v0.8h, v8.8h
557 smull2 v19.4s, v1.8h, v9.8h
559 smull2 v21.4s, v2.8h, v10.8h
561 smull2 v23.4s, v3.8h, v11.8h
563 smull2 v25.4s, v4.8h, v12.8h
565 smull2 v27.4s, v5.8h, v13.8h
567 smull2 v29.4s, v6.8h, v14.8h
569 smull2 v31.4s, v7.8h, v15.8h
/external/llvm/test/MC/AArch64/
Dneon-2velem.s222 smull2 v0.4s, v1.8h, v2.h[2]
223 smull2 v0.2d, v1.4s, v2.s[2]
224 smull2 v0.2d, v1.4s, v22.s[2]
Dneon-3vdiff.s217 smull2 v0.8h, v1.16b, v2.16b
218 smull2 v0.4s, v1.8h, v2.8h
219 smull2 v0.2d, v1.4s, v2.4s
Dneon-diagnostics.s2449 smull2 v0.8h, v1.16h, v2.16b
2450 smull2 v0.4s, v1.8s, v2.8h
2451 smull2 v0.2d, v1.4d, v2.4s
3489 smull2 v0.4h, v1.8h, v2.h[2]
3490 smull2 v0.4s, v1.8h, v2.h[8]
3491 smull2 v0.4s, v1.8h, v16.h[4]
3492 smull2 v0.2s, v1.4s, v2.s[2]
3493 smull2 v0.2d, v1.4s, v2.s[4]
3494 smull2 v0.2d, v1.4s, v22.s[4]
Darm64-advsimd.s1238 smull2.4s v0, v0, v0[1]
1240 smull2.2d v0, v0, v0[3]
1307 ; CHECK: smull2.4s v0, v0, v0[1] ; encoding: [0x00,0xa0,0x50,0x4f]
1309 ; CHECK: smull2.2d v0, v0, v0[3] ; encoding: [0x00,0xa8,0xa0,0x4f]
2138 smull2 v9.8h, v13.16b, v14.16b
2140 smull2 v9.4s, v13.8h, v14.8h
2142 smull2 v9.2d, v13.4s, v14.4s
2144 ; CHECK: smull2.8h v9, v13, v14 ; encoding: [0xa9,0xc1,0x2e,0x4e]
2146 ; CHECK: smull2.4s v9, v13, v14 ; encoding: [0xa9,0xc1,0x6e,0x4e]
2148 ; CHECK: smull2.2d v9, v13, v14 ; encoding: [0xa9,0xc1,0xae,0x4e]
/external/libjpeg-turbo/simd/
Djsimd_arm64_neon.S1611 smull2 v22.4s, v6.8h, v1.h[1] /* multiply by -11277 */
1614 smull2 v26.4s, v8.8h, v1.h[0] /* multiply by 22971 */
1616 smull2 v30.4s, v6.8h, v1.h[3] /* multiply by 29033 */
1667 smull2 v22.4s, v6.8h, v1.h[1] /* multiply by -11277 */
1670 smull2 v26.4s, v8.8h, v1.h[0] /* multiply by 22971 */
1680 smull2 v22.4s, v6.8h, v1.h[1] /* multiply by -11277 */
1684 smull2 v26.4s, v8.8h, v1.h[0] /* multiply by 22971 */
1692 smull2 v30.4s, v6.8h, v1.h[3] /* multiply by 29033 */
/external/llvm/test/CodeGen/AArch64/
Darm64-neon-2velem-high.ll7 ; CHECK-NEXT: smull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, [[REPLICATE]].8h
22 ; CHECK-NEXT: smull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, [[REPLICATE]].8h
33 ; CHECK-NEXT: smull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, [[REPLICATE]].4s
46 ; CHECK-NEXT: smull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, [[REPLICATE]].4s
Darm64-vmul.ll1242 ; CHECK-NEXT: smull2.8h v0, v0, v1
1252 ; CHECK: smull2.8h v0, v0, v1
1265 ; CHECK: smull2.4s v0, v0, v1
1278 ; CHECK: smull2.2d v0, v0, v1
1330 ; CHECK-NEXT: smull2.4s v0, v1, v2[1]
1343 ; CHECK-NEXT: smull2.2d v0, v1, v2[1]
1674 ; CHECK: smull2.4s
1692 ; CHECK: smull2.2d
Darm64-neon-3vdiff.ll1375 ; CHECK: smull2 {{v[0-9]+}}.8h, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1385 ; CHECK: smull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1395 ; CHECK: smull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
/external/vixl/src/vixl/a64/
Dsimulator-a64.h1509 LogicVRegister smull2(VectorFormat vform,
2171 V(smull2) \
Dlogic-a64.cc879 LogicVRegister Simulator::smull2(VectorFormat vform, in smull2() function in vixl::Simulator
887 return smull2(vform, dst, src1, dup_element(indexform, temp, src2, index)); in smull2()
3101 LogicVRegister Simulator::smull2(VectorFormat vform, in smull2() function in vixl::Simulator
3264 LogicVRegister product = smull2(vform, temp, src1, src2); in sqdmull2()
Dmacro-assembler-a64.h2176 V(smull2, Smull2) \
2372 V(smull2, Smull2) \
Dassembler-a64.h2440 void smull2(const VRegister& vd,
3490 void smull2(const VRegister& vd,
Dsimulator-a64.cc2726 case NEON_SMULL2: smull2(vf_l, rd, rn, rm); break; in VisitNEON3Different()
2818 Op = &Simulator::smull2; in VisitNEONByIndexedElement()
Dassembler-a64.cc2415 V(smull2, NEON_SMULL2, vn.IsVector() && vn.IsQ()) \
3572 V(smull2, NEON_SMULL_byelement, vn.IsVector() && vn.IsQ()) \ in NEON_FPBYELEMENT_LIST()
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt1301 # CHECK: smull2 v0.8h, v1.16b, v2.16b
1302 # CHECK: smull2 v0.4s, v1.8h, v2.8h
1303 # CHECK: smull2 v0.2d, v1.4s, v2.4s
Darm64-advsimd.txt1723 # CHECK: smull2.4s v0, v0, v0[1]
1725 # CHECK: smull2.2d v0, v0, v0[3]
/external/vixl/doc/
Dsupported-instructions.md3302 void smull2(const VRegister& vd,
3311 void smull2(const VRegister& vd,
/external/valgrind/none/tests/arm64/
Dfp_and_simd.stdout.exp27835 smull2 v29.2d, v20.4s, v3.s[1] 674e526085800d9c99be27b7f8207e07 43bc2157057f3f5e6d9aaa1362dc8cb4…
27836 smull2 v29.2d, v20.4s, v3.s[2] 04e23d193764948a35c9faff0d5c6c0b 54e94114b65f31c35957427c9a947c75…
27839 smull2 v29.4s, v20.8h, v3.h[1] bccd012b33021b83896e64a2f2f636cc ebb18924f5c29dd89fa55df5adf871a2…
27840 smull2 v29.4s, v20.8h, v3.h[1] a76e3c560df4bb9388697a9e03e3f1f6 a2a2914aa6e7c0d9450ad00ab99a4602…
27875 smull2 v2.2d, v11.4s, v29.4s af66c072879b7d6c4d77c9d17ec5a616 20ff4667da5a9c338a9655f9db545e32 …
27877 smull2 v2.4s, v11.8h, v29.8h 14a0031f111bd9501b1965180834074d 669dd875a6c8b190a5c32f12c9defab7 …
27879 smull2 v2.8h, v11.16b, v29.16b c3f4c6947d6372cbb4b0c02ce9eb016e 0d0de060bb2822a70c32480ccfb0aeec…