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Searched refs:sqneg (Results 1 – 16 of 16) sorted by relevance

/external/llvm/test/MC/AArch64/
Dneon-scalar-neg.s17 sqneg b19, b14
18 sqneg h21, h15
19 sqneg s20, s12
20 sqneg d18, d12
Dneon-simd-misc.s175 sqneg v0.16b, v31.16b
176 sqneg v2.8h, v4.8h
177 sqneg v6.4s, v8.4s
178 sqneg v6.2d, v8.2d
179 sqneg v1.8b, v9.8b
180 sqneg v13.4h, v21.4h
181 sqneg v4.2s, v0.2s
Dneon-diagnostics.s5446 sqneg v0.16b, v31.8b
5447 sqneg v2.8h, v4.4h
5448 sqneg v6.4s, v8.2s
5449 sqneg v6.2d, v8.2s
Darm64-advsimd.s596 sqneg.8b v0, v0
646 ; CHECK: sqneg.8b v0, v0 ; encoding: [0x00,0x78,0x20,0x2e]
/external/llvm/test/CodeGen/AArch64/
Darm64-arith-saturating.ll105 ; CHECK: sqneg s0, s0
108 %vqneg.i = tail call i32 @llvm.aarch64.neon.sqneg.i32(i32 %vecext) nounwind
114 ; CHECK: sqneg d0, d0
117 %vqneg.i = tail call i64 @llvm.aarch64.neon.sqneg.i64(i64 %vecext) nounwind
121 declare i64 @llvm.aarch64.neon.sqneg.i64(i64) nounwind readnone
122 declare i32 @llvm.aarch64.neon.sqneg.i32(i32) nounwind readnone
Darm64-vabs.ll413 ;CHECK: sqneg.8b
415 %tmp3 = call <8 x i8> @llvm.aarch64.neon.sqneg.v8i8(<8 x i8> %tmp1)
421 ;CHECK: sqneg.16b
423 %tmp3 = call <16 x i8> @llvm.aarch64.neon.sqneg.v16i8(<16 x i8> %tmp1)
429 ;CHECK: sqneg.4h
431 %tmp3 = call <4 x i16> @llvm.aarch64.neon.sqneg.v4i16(<4 x i16> %tmp1)
437 ;CHECK: sqneg.8h
439 %tmp3 = call <8 x i16> @llvm.aarch64.neon.sqneg.v8i16(<8 x i16> %tmp1)
445 ;CHECK: sqneg.2s
447 %tmp3 = call <2 x i32> @llvm.aarch64.neon.sqneg.v2i32(<2 x i32> %tmp1)
[all …]
/external/valgrind/none/tests/arm64/
Dfp_and_simd.c3561 GEN_UNARY_TEST(sqneg, 2d, 2d)
3562 GEN_UNARY_TEST(sqneg, 4s, 4s)
3563 GEN_UNARY_TEST(sqneg, 2s, 2s)
3564 GEN_UNARY_TEST(sqneg, 8h, 8h)
3565 GEN_UNARY_TEST(sqneg, 4h, 4h)
3566 GEN_UNARY_TEST(sqneg, 16b, 16b)
3567 GEN_UNARY_TEST(sqneg, 8b, 8b)
Dfp_and_simd.stdout.exp27909 sqneg d7, d30 509a737bd38fb2f64e226c4ac45d10b6 9801a3c3dca3e509a52f59abe34b1bac 000000000000000…
27910 sqneg s7, s30 c93f4c7b7641a2ce8febf8b9926b284d 8cca2f0e6e2615e51fafcd4e8caa59a0 000000000000000…
27911 sqneg h7, h30 1568327c76eb994a17fee54ff1f35b6d ec109e937418a41d786f7850dffc09d4 000000000000000…
27912 sqneg b7, b30 95f78360346bf54a473a92e942d607f4 18b252325059f291114fbd8f3b218b28 000000000000000…
27920 sqneg v8.2d, v7.2d7e3288536cd3a0b4dea0abc15b3e5fa3 81cd77ac932c5f4c215f543ea4c1a05d fpsr=00000000
27921 sqneg v8.4s, v7.4sfbf1f7713cdcbcf6e3411f0db3d48a4a 040e088fc323430a1cbee0f34c2b75b6 fpsr=00000000
27922 sqneg v8.2s, v7.2sfc980825914918d647fa89789eeffa8a 0000000000000000b805768861100576 fpsr=00000000
27923 sqneg v8.8h, v7.8hcb21260bf8566031d847d51f274adbbd 34dfd9f507aa9fcf27b92ae1d8b62443 fpsr=00000000
27924 sqneg v8.4h, v7.4hb58abcc0fc3f3fe260a4f01e5ba25841 00000000000000009f5c0fe2a45ea7bf fpsr=00000000
27925 sqneg v8.16b, v7.16b06ce38df2a3f62c7ac8ec49045b39e71 fa32c821d6c19e3954723c70bb4d628f fpsr=00000000
[all …]
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt1726 # CHECK: sqneg b19, b14
1727 # CHECK: sqneg h21, h15
1728 # CHECK: sqneg s20, s12
1729 # CHECK: sqneg d18, d12
Darm64-advsimd.txt495 # CHECK: sqneg.8b v0, v0
/external/vixl/test/
Dtest-simulator-a64.cc3970 DEFINE_TEST_NEON_2SAME(sqneg, Basic) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
4017 DEFINE_TEST_NEON_2SAME_SCALAR(sqneg, Basic) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
/external/vixl/src/vixl/a64/
Dmacro-assembler-a64.h2302 V(sqneg, Sqneg) \
Dassembler-a64.h2684 void sqneg(const VRegister& vd,
Dassembler-a64.cc3629 void Assembler::sqneg(const VRegister& vd, in sqneg() function in vixl::Assembler
/external/vixl/doc/
Dsupported-instructions.md3471 void sqneg(const VRegister& vd,
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td2804 defm SQNEG : SIMDTwoVectorBHSD<1, 0b00111, "sqneg", int_aarch64_neon_sqneg>;
3285 defm SQNEG : SIMDTwoScalarBHSD< 1, 0b00111, "sqneg", int_aarch64_neon_sqneg>;