Home
last modified time | relevance | path

Searched refs:sqxtn (Results 1 – 25 of 26) sorted by relevance

12

/external/llvm/test/MC/AArch64/
Dneon-scalar-extract-narrow.s21 sqxtn b18, h18
22 sqxtn h20, s17
23 sqxtn s19, d14
Darm64-fp-encoding.s703 sqxtn b4, h2
704 sqxtn h2, s3
705 sqxtn s9, d2
707 ; CHECK: sqxtn b4, h2 ; encoding: [0x44,0x48,0x21,0x5e]
708 ; CHECK: sqxtn h2, s3 ; encoding: [0x62,0x48,0x61,0x5e]
709 ; CHECK: sqxtn s9, d2 ; encoding: [0x49,0x48,0xa1,0x5e]
Dneon-simd-misc.s372 sqxtn v1.8b, v9.8h
373 sqxtn v13.4h, v21.4s
374 sqxtn v4.2s, v0.2d
Dneon-diagnostics.s4871 sqxtn b18, b18
4872 sqxtn h20, h17
4873 sqxtn s19, s14
5693 sqxtn v0.16b, v31.8h
5694 sqxtn v2.8h, v4.4s
5695 sqxtn v6.4s, v8.2d
Darm64-advsimd.s597 sqxtn.8b v0, v0
647 ; CHECK: sqxtn.8b v0, v0 ; encoding: [0x00,0x48,0x21,0x0e]
/external/llvm/test/CodeGen/AArch64/
Darm64-vmovn.ll63 ;CHECK: sqxtn.8b v0, v0
65 %tmp3 = call <8 x i8> @llvm.aarch64.neon.sqxtn.v8i8(<8 x i16> %A)
72 ;CHECK: sqxtn.4h v0, v0
74 %tmp3 = call <4 x i16> @llvm.aarch64.neon.sqxtn.v4i16(<4 x i32> %A)
81 ;CHECK: sqxtn.2s v0, v0
83 %tmp3 = call <2 x i32> @llvm.aarch64.neon.sqxtn.v2i32(<2 x i64> %A)
92 %tmp3 = call <8 x i8> @llvm.aarch64.neon.sqxtn.v8i8(<8 x i16> %A)
102 %tmp3 = call <4 x i16> @llvm.aarch64.neon.sqxtn.v4i16(<4 x i32> %A)
112 %tmp3 = call <2 x i32> @llvm.aarch64.neon.sqxtn.v2i32(<2 x i64> %A)
117 declare <8 x i8> @llvm.aarch64.neon.sqxtn.v8i8(<8 x i16>) nounwind readnone
[all …]
Darm64-arith-saturating.ll137 ; CHECK: sqxtn s0, d0
139 %vqmovn.i = tail call i32 @llvm.aarch64.neon.scalar.sqxtn.i32.i64(i64 %vecext) nounwind
152 declare i32 @llvm.aarch64.neon.scalar.sqxtn.i32.i64(i64) nounwind readnone
/external/libhevc/common/arm64/
Dihevc_intra_pred_luma_mode_3_to_9.s170 sqxtn v1.8b, v22.8h
297 sqxtn v25.8b, v12.8h
422 sqxtn v25.8b, v14.8h
504 sqxtn v1.8b, v22.8h
Dihevc_intra_pred_filters_luma_mode_11_to_17.s292 sqxtn v19.8b, v22.8h
417 sqxtn v25.8b, v12.8h
543 sqxtn v25.8b, v14.8h
633 sqxtn v19.8b, v22.8h
Dihevc_intra_pred_chroma_mode_3_to_9.s163 sqxtn v2.8b, v22.8h
298 sqxtn v23.8b, v25.8h
427 sqxtn v23.8b, v14.8h
Dihevc_deblk_luma_vert.s485 sqxtn v16.8b,v16.8h
532 sqxtn v16.8b,v16.8h
590 sqxtn v3.8b,v2.8h
Dihevc_intra_pred_filters_chroma_mode_11_to_17.s284 sqxtn v19.8b, v22.8h
420 sqxtn v25.8b, v12.8h
562 sqxtn v25.8b, v14.8h
Dihevc_deblk_luma_horz.s495 sqxtn v10.8b, v10.8h
/external/vixl/src/vixl/a64/
Dlogic-a64.cc2119 LogicVRegister Simulator::sqxtn(VectorFormat vform, in sqxtn() function in vixl::Simulator
2697 return sqxtn(vformdst, dst, shifted_src); in sqshrn()
2709 return sqxtn(vformdst, dst, shifted_src); in sqshrn2()
2721 return sqxtn(vformdst, dst, shifted_src); in sqrshrn()
2733 return sqxtn(vformdst, dst, shifted_src); in sqrshrn2()
Dsimulator-a64.cc2543 case NEON_SQXTN: sqxtn(vf, rd, rn); return; in VisitNEON2RegMisc()
3458 case NEON_SQXTN_scalar: sqxtn(vf, rd, rn); break; in VisitNEONScalar2RegMisc()
Dsimulator-a64.h2056 LogicVRegister sqxtn(VectorFormat vform,
Dmacro-assembler-a64.h2303 V(sqxtn, Sqxtn) \
Dassembler-a64.h2700 void sqxtn(const VRegister& vd,
Dassembler-a64.cc3672 void Assembler::sqxtn(const VRegister& vd, in sqxtn() function in vixl::Assembler
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt1796 # CHECK: sqxtn b18, h18
1797 # CHECK: sqxtn h20, s17
1798 # CHECK: sqxtn s19, d14
Darm64-advsimd.txt496 # CHECK: sqxtn.8b v0, v0
/external/valgrind/none/tests/arm64/
Dfp_and_simd.c4043 GEN_UNARY_TEST(sqxtn, 2s, 2d)
4045 GEN_UNARY_TEST(sqxtn, 4h, 4s)
4047 GEN_UNARY_TEST(sqxtn, 8b, 8h)
Dfp_and_simd.stdout.exp28383 sqxtn s31, d0 2daa3efd36c0e63992f1e3357cc7f325 bf48bd2f9a346e6dd07548facb6cf40e 00000000000000…
28384 sqxtn h31, s0 432bfbb09c960a7c8b474ffe77445fbf 839c3e4051983c39cb9b220ca6208fe8 00000000000000…
28385 sqxtn b31, h0 a3ba0d1b8496f597978b80103c3e2c60 79910ce9a18bd12ae9960305814fac79 00000000000000…
28392 sqxtn v8.2s, v7.2d50d209ba063497ae8b6bb7f363035a47 00000000000000007fffffff80000000 fpsr=08000000
28394 sqxtn v8.4h, v7.4s616fbaf2c05edf3e642d1b9a4988ca96 00000000000000007fff80007fff7fff fpsr=08000000
28396 sqxtn v8.8b, v7.8h4591782cd97f2d728437e067c089546e 00000000000000007f7f807f8080807f fpsr=08000000
/external/vixl/test/
Dtest-simulator-a64.cc3946 DEFINE_TEST_NEON_2DIFF_NARROW(sqxtn, Basic) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
4004 DEFINE_TEST_NEON_2DIFF_SCALAR_NARROW(sqxtn, Basic) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
/external/vixl/doc/
Dsupported-instructions.md3615 void sqxtn(const VRegister& vd,

12