Searched refs:stlr (Results 1 – 13 of 13) sorted by relevance
| /external/llvm/test/MC/AArch64/ |
| D | arm64-memory.s | 496 stlr w3, [x6]
497 stlr x3, [x6]
501 ; CHECK: stlr w3, [x6] ; encoding: [0xc3,0xfc,0x9f,0x88]
502 ; CHECK: stlr x3, [x6] ; encoding: [0xc3,0xfc,0x9f,0xc8]
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| D | basic-a64-instructions.s | 2315 stlr wzr, [x1]
2316 stlr x30, [x2]
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-memory.txt | 482 # CHECK: stlr w3, [x6]
483 # CHECK: stlr x3, [x6]
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| D | basic-a64-instructions.txt | 1991 #CHECK: stlr w26, [x29]
1992 #CHECK: stlr x27, [x28]
1993 #CHECK: stlr x27, [x28]
1994 #CHECK: stlr x27, [x28]
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| /external/vixl/ |
| D | README.md | 119 `stlrh`, `stlr`, `ldarb`, `ldarh`, `ldar`, `clrex`.
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| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-atomic.ll | 263 ; CHECK: stlr
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| D | atomic-ops.ll | 1147 ; CHECK: stlr x0, [x[[ADDR]]]
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| /external/vixl/test/ |
| D | test-disasm-a64.cc | 1816 COMPARE(stlr(w1, MemOperand(x2)), "stlr w1, [x2]"); in TEST()
1817 COMPARE(stlr(w3, MemOperand(sp)), "stlr w3, [sp]"); in TEST()
1818 COMPARE(stlr(x4, MemOperand(x5)), "stlr x4, [x5]"); in TEST()
1819 COMPARE(stlr(x6, MemOperand(sp)), "stlr x6, [sp]"); in TEST()
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| /external/vixl/src/vixl/a64/ |
| D | macro-assembler-a64.h | 1811 stlr(rt, dst); in Stlr()
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| D | assembler-a64.h | 1903 void stlr(const Register& rt, const MemOperand& dst);
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| D | assembler-a64.cc | 1857 void Assembler::stlr(const Register& rt, in stlr() function in vixl::Assembler
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| /external/vixl/doc/ |
| D | supported-instructions.md | 1082 void stlr(const Register& rt, const MemOperand& dst)
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 2390 def STLRW : StoreRelease <0b10, 1, 0, 0, 1, GPR32, "stlr">;
2391 def STLRX : StoreRelease <0b11, 1, 0, 0, 1, GPR64, "stlr">;
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