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Searched refs:tgeu (Results 1 – 25 of 49) sorted by relevance

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/external/llvm/test/MC/Mips/
Dmips-control-instructions.s26 # CHECK32: tgeu $zero, $3 # encoding: [0x00,0x03,0x00,0x31]
27 # CHECK32: tgeu $zero, $3, 7 # encoding: [0x00,0x03,0x01,0xf1]
59 # CHECK64: tgeu $zero, $3 # encoding: [0x00,0x03,0x00,0x31]
60 # CHECK64: tgeu $zero, $3, 7 # encoding: [0x00,0x03,0x01,0xf1]
95 tgeu $0,$3
96 tgeu $0,$3,7
Dmicromips-trap-instructions.s14 # CHECK-EL: tgeu $8, $9 # encoding: [0x28,0x01,0x3c,0x04]
29 # CHECK-EB: tgeu $8, $9 # encoding: [0x01,0x28,0x04,0x3c]
41 tgeu $8, $9, 0
/external/llvm/test/MC/Mips/mips2/
Dvalid.s155 … tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
156 … tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
/external/llvm/test/MC/Mips/mips32/
Dvalid.s185 … tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
186 … tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
/external/llvm/test/MC/Mips/micromips32r6/
Dinvalid.s61 tgeu $34, $9, 5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
62 tgeu $8, $35, 6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
63 …tgeu $8, $9, 16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of ran…
75 tgeu $8, $9, $2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
Dvalid.s218 tgeu $22, $gp # CHECK: tgeu $22, $gp # encoding: [0x03,0x96,0x04,0x3c]
219 tgeu $20, $14, 15 # CHECK: tgeu $20, $14, 15 # encoding: [0x01,0xd4,0xf4,0x3c]
/external/llvm/test/MC/Mips/mips3/
Dvalid.s219 … tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
220 … tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
/external/llvm/test/MC/Mips/mips32r3/
Dvalid.s222 … tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
223 … tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
/external/llvm/test/MC/Mips/mips32r2/
Dvalid.s222 … tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
223 … tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
/external/llvm/test/MC/Mips/mips32r5/
Dvalid.s223 … tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
224 … tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
/external/llvm/test/MC/Mips/micromips64r6/
Dinvalid.s86 tgeu $34, $9, 5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
87 tgeu $8, $35, 6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
88 …tgeu $8, $9, 16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of ran…
100 tgeu $8, $9, $2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
Dvalid.s104 tgeu $22, $gp # CHECK: tgeu $22, $gp # encoding: [0x03,0x96,0x04,0x3c]
105 tgeu $20, $14, 15 # CHECK: tgeu $20, $14, 15 # encoding: [0x01,0xd4,0xf4,0x3c]
/external/llvm/test/MC/Mips/mips5/
Dvalid.s250 … tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
251 … tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
/external/llvm/test/MC/Mips/mips64/
Dvalid.s269 … tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
270 … tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
/external/llvm/test/MC/Mips/mips4/
Dvalid.s248 … tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
249 … tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
/external/llvm/test/MC/Mips/mips64r2/
Dvalid.s295 … tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
296 … tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
/external/llvm/test/MC/Mips/mips64r5/
Dvalid.s296 … tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
297 … tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
/external/llvm/test/MC/Mips/mips64r3/
Dvalid.s295 … tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
296 … tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
/external/llvm/test/MC/Mips/mips1/
Dinvalid-mips2.s35 …tgeu $22,$28 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
36 …tgeu $20,$14,379 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
/external/llvm/test/MC/Disassembler/Mips/mips2/
Dvalid-mips2-el.txt144 0x31 0x00 0xdc 0x02 # CHECK: tgeu $22, $gp
145 0xf1 0x5e 0x8e 0x02 # CHECK: tgeu $20, $14, 379
Dvalid-mips2.txt56 0x02 0x8e 0x5e 0xf1 # CHECK: tgeu $20, $14, 379
59 0x02 0xdc 0x00 0x31 # CHECK: tgeu $22, $gp
/external/llvm/test/MC/Disassembler/Mips/mips32r6/
Dvalid-mips32r6-el.txt135 0x31 0x00 0xdc 0x02 # CHECK: tgeu $22, $gp
136 0xf1 0x5e 0x8e 0x02 # CHECK: tgeu $20, $14, 379
Dvalid-mips32r6.txt32 0x02 0x8e 0x5e 0xf1 # CHECK: tgeu $20, $14, 379
33 0x02 0xdc 0x00 0x31 # CHECK: tgeu $22, $gp
/external/llvm/test/MC/Disassembler/Mips/mips64r6/
Dvalid-mips64r6-el.txt165 0xf1 0x5e 0x8e 0x02 # CHECK: tgeu $20, $14, 379
166 0x31 0x00 0xdc 0x02 # CHECK: tgeu $22, $gp
/external/llvm/test/MC/Disassembler/Mips/micromips64r6/
Dvalid.txt123 0x03 0x96 0x04 0x3c # CHECK: tgeu $22, $gp
124 0x01 0xd4 0xf4 0x3c # CHECK: tgeu $20, $14, 15

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