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Searched refs:umull (Results 1 – 25 of 77) sorted by relevance

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/external/llvm/test/CodeGen/ARM/
D2011-02-04-AntidepMultidef.ll4 ; Armv6 generates a umull that must write to two distinct destination regs.
25 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
28 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
39 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
42 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
53 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
56 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
67 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
70 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
78 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
[all …]
Dmulhi.ll24 ; V6: umull
27 ; V4: umull
30 ; M3: umull
D2011-04-26-SchedTweak.ll3 ; Do not move the umull above previous call which would require use of
40 ; CHECK-NOT: umull
42 ; CHECK: umull
/external/libavc/common/armv8/
Dih264_inter_pred_chroma_av8.s153 umull v20.8h, v0.8b, v28.8b
161 umull v22.8h, v1.8b, v28.8b
169 umull v24.8h, v5.8b, v28.8b
177 umull v16.8h, v6.8b, v28.8b
184 umull v20.8h, v10.8b, v28.8b
189 umull v24.8h, v11.8b, v28.8b
196 umull v20.8h, v0.8b, v28.8b
202 umull v22.8h, v1.8b, v28.8b
215 umull v24.8h, v5.8b, v28.8b
222 umull v16.8h, v6.8b, v28.8b
[all …]
/external/libhevc/common/arm64/
Dihevc_intra_pred_chroma_mode_27_to_33.s140 umull v2.8h, v3.8b, v0.8b //pos = ((row + 1) * intra_pred_ang)
169 umull v10.8h, v23.8b, v30.8b //(i row)vmull_u8(ref_main_idx, dup_const_32_fract)
180 umull v14.8h, v12.8b, v28.8b //(ii)vmull_u8(ref_main_idx, dup_const_32_fract)
195 umull v18.8h, v16.8b, v26.8b //(iii)vmull_u8(ref_main_idx, dup_const_32_fract)
212 umull v22.8h, v20.8b, v24.8b //(iv)vmull_u8(ref_main_idx, dup_const_32_fract)
230 umull v10.8h, v23.8b, v30.8b //(v)vmull_u8(ref_main_idx, dup_const_32_fract)
246 umull v14.8h, v12.8b, v28.8b //(vi)vmull_u8(ref_main_idx, dup_const_32_fract)
259 umull v18.8h, v16.8b, v26.8b //(vii)vmull_u8(ref_main_idx, dup_const_32_fract)
273 umull v2.8h, v5.8b, v0.8b //pos = ((row + 1) * intra_pred_ang)
294 umull v22.8h, v20.8b, v24.8b //(viii)vmull_u8(ref_main_idx, dup_const_32_fract)
[all …]
Dihevc_intra_pred_luma_mode_27_to_33.s145 umull v2.8h, v3.8b, v0.8b //pos = ((row + 1) * intra_pred_ang)
174 umull v10.8h, v23.8b, v30.8b //(i row)vmull_u8(ref_main_idx, dup_const_32_fract)
185 umull v14.8h, v12.8b, v28.8b //(ii)vmull_u8(ref_main_idx, dup_const_32_fract)
200 umull v18.8h, v16.8b, v26.8b //(iii)vmull_u8(ref_main_idx, dup_const_32_fract)
217 umull v22.8h, v20.8b, v24.8b //(iv)vmull_u8(ref_main_idx, dup_const_32_fract)
235 umull v10.8h, v23.8b, v30.8b //(v)vmull_u8(ref_main_idx, dup_const_32_fract)
251 umull v14.8h, v12.8b, v28.8b //(vi)vmull_u8(ref_main_idx, dup_const_32_fract)
264 umull v18.8h, v16.8b, v26.8b //(vii)vmull_u8(ref_main_idx, dup_const_32_fract)
278 umull v2.8h, v5.8b, v0.8b //pos = ((row + 1) * intra_pred_ang)
299 umull v22.8h, v20.8b, v24.8b //(viii)vmull_u8(ref_main_idx, dup_const_32_fract)
[all …]
Dihevc_inter_pred_chroma_vert_w16out.s151 umull v6.8h, v17.8b, v1.8b //vmull_u8(vreinterpret_u8_u32(src_tmp2), coeffabs_1)
156 umull v4.8h, v4.8b, v1.8b
194 umull v4.8h, v7.8b, v1.8b //vmull_u8(vreinterpret_u8_u32(src_tmp2), coeffabs_1)
238 umull v30.8h, v5.8b, v1.8b //mul with coeff 1
246 umull v28.8h, v6.8b, v1.8b //mul_res 2
257 umull v26.8h, v7.8b, v1.8b
267 umull v24.8h, v16.8b, v1.8b
285 umull v30.8h, v5.8b, v1.8b //mul with coeff 1
301 umull v28.8h, v6.8b, v1.8b //mul_res 2
313 umull v26.8h, v7.8b, v1.8b
[all …]
Dihevc_inter_pred_chroma_horz_w16out.s206 umull v30.8h, v2.8b, v25.8b //mul_res = vmull_u8(src[0_3], coeffabs_3)//
225 umull v28.8h, v3.8b, v25.8b
252 umull v22.8h, v10.8b, v25.8b //mul_res = vmull_u8(src[0_3], coeffabs_3)//
287 umull v20.8h, v11.8b, v25.8b //mul_res = vmull_u8(src[0_3], coeffabs_3)//
304 umull v30.8h, v2.8b, v25.8b //mul_res = vmull_u8(src[0_3], coeffabs_3)//
318 umull v28.8h, v3.8b, v25.8b
347 umull v22.8h, v10.8b, v25.8b //mul_res = vmull_u8(src[0_3], coeffabs_3)//
365 umull v20.8h, v11.8b, v25.8b //mul_res = vmull_u8(src[0_3], coeffabs_3)//
384 umull v30.8h, v2.8b, v25.8b //mul_res = vmull_u8(src[0_3], coeffabs_3)//
399 umull v28.8h, v3.8b, v25.8b
[all …]
Dihevc_inter_pred_chroma_vert.s148 umull v6.8h, v17.8b, v1.8b //vmull_u8(vreinterpret_u8_u32(src_tmp2), coeffabs_1)
153 umull v4.8h, v4.8b, v1.8b
193 umull v4.8h, v7.8b, v1.8b //vmull_u8(vreinterpret_u8_u32(src_tmp2), coeffabs_1)
237 umull v30.8h, v5.8b, v1.8b //mul with coeff 1
245 umull v28.8h, v6.8b, v1.8b //mul_res 2
257 umull v26.8h, v7.8b, v1.8b
268 umull v24.8h, v16.8b, v1.8b
288 umull v30.8h, v5.8b, v1.8b //mul with coeff 1
304 umull v28.8h, v6.8b, v1.8b //mul_res 2
318 umull v26.8h, v7.8b, v1.8b
[all …]
Dihevc_intra_pred_luma_mode_3_to_9.s190 umull v24.8h, v12.8b, v7.8b //mul (row 0)
200 umull v22.8h, v16.8b, v7.8b //mul (row 1)
211 umull v20.8h, v14.8b, v7.8b //mul (row 2)
222 umull v18.8h, v23.8b, v7.8b //mul (row 3)
233 umull v24.8h, v12.8b, v7.8b //mul (row 4)
244 umull v22.8h, v16.8b, v7.8b //mul (row 5)
255 umull v20.8h, v14.8b, v7.8b //mul (row 6)
259 umull v18.8h, v23.8b, v7.8b //mul (row 7)
317 umull v20.8h, v14.8b, v7.8b //mul (row 6)
343 umull v18.8h, v23.8b, v7.8b //mul (row 7)
[all …]
Dihevc_inter_pred_chroma_horz.s191 umull v30.8h, v2.8b, v25.8b //mul_res = vmull_u8(src[0_3], coeffabs_3)//
210 umull v28.8h, v3.8b, v25.8b
240 umull v22.8h, v10.8b, v25.8b //mul_res = vmull_u8(src[0_3], coeffabs_3)//
277 umull v20.8h, v11.8b, v25.8b //mul_res = vmull_u8(src[0_3], coeffabs_3)//
297 umull v30.8h, v2.8b, v25.8b //mul_res = vmull_u8(src[0_3], coeffabs_3)//
316 umull v28.8h, v3.8b, v25.8b
354 umull v22.8h, v10.8b, v25.8b //mul_res = vmull_u8(src[0_3], coeffabs_3)//
370 umull v20.8h, v11.8b, v25.8b //mul_res = vmull_u8(src[0_3], coeffabs_3)//
387 umull v30.8h, v2.8b, v25.8b //mul_res = vmull_u8(src[0_3], coeffabs_3)//
402 umull v28.8h, v3.8b, v25.8b
[all …]
Dihevc_intra_pred_filters_luma_mode_19_to_25.s284 umull v10.8h, v23.8b, v30.8b //(i row)vmull_u8(ref_main_idx, dup_const_32_fract)
294 umull v14.8h, v12.8b, v28.8b //(ii)vmull_u8(ref_main_idx, dup_const_32_fract)
309 umull v18.8h, v16.8b, v26.8b //(iii)vmull_u8(ref_main_idx, dup_const_32_fract)
325 umull v22.8h, v20.8b, v24.8b //(iv)vmull_u8(ref_main_idx, dup_const_32_fract)
342 umull v10.8h, v23.8b, v30.8b //(v)vmull_u8(ref_main_idx, dup_const_32_fract)
357 umull v14.8h, v12.8b, v28.8b //(vi)vmull_u8(ref_main_idx, dup_const_32_fract)
370 umull v18.8h, v16.8b, v26.8b //(vii)vmull_u8(ref_main_idx, dup_const_32_fract)
406 umull v22.8h, v20.8b, v24.8b //(viii)vmull_u8(ref_main_idx, dup_const_32_fract)
422 umull v10.8h, v23.8b, v30.8b //(i)vmull_u8(ref_main_idx, dup_const_32_fract)
439 umull v14.8h, v12.8b, v28.8b //(ii)vmull_u8(ref_main_idx, dup_const_32_fract)
[all …]
Dihevc_intra_pred_filters_chroma_mode_19_to_25.s281 umull v23.8h, v7.8b, v30.8b //(i row)vmull_u8(ref_main_idx, dup_const_32_fract)
291 umull v14.8h, v12.8b, v28.8b //(ii)vmull_u8(ref_main_idx, dup_const_32_fract)
306 umull v18.8h, v16.8b, v26.8b //(iii)vmull_u8(ref_main_idx, dup_const_32_fract)
322 umull v22.8h, v20.8b, v24.8b //(iv)vmull_u8(ref_main_idx, dup_const_32_fract)
339 umull v23.8h, v7.8b, v30.8b //(v)vmull_u8(ref_main_idx, dup_const_32_fract)
354 umull v14.8h, v12.8b, v28.8b //(vi)vmull_u8(ref_main_idx, dup_const_32_fract)
370 umull v18.8h, v16.8b, v26.8b //(vii)vmull_u8(ref_main_idx, dup_const_32_fract)
407 umull v22.8h, v20.8b, v24.8b //(viii)vmull_u8(ref_main_idx, dup_const_32_fract)
423 umull v23.8h, v7.8b, v30.8b //(i)vmull_u8(ref_main_idx, dup_const_32_fract)
439 umull v14.8h, v12.8b, v28.8b //(ii)vmull_u8(ref_main_idx, dup_const_32_fract)
[all …]
Dihevc_intra_pred_filters_luma_mode_11_to_17.s310 umull v24.8h, v12.8b, v7.8b //mul (row 0)
320 umull v22.8h, v16.8b, v7.8b //mul (row 1)
331 umull v20.8h, v14.8b, v7.8b //mul (row 2)
342 umull v18.8h, v23.8b, v7.8b //mul (row 3)
353 umull v24.8h, v12.8b, v7.8b //mul (row 4)
364 umull v22.8h, v16.8b, v7.8b //mul (row 5)
375 umull v20.8h, v14.8b, v7.8b //mul (row 6)
379 umull v18.8h, v23.8b, v7.8b //mul (row 7)
438 umull v20.8h, v14.8b, v7.8b //mul (row 6)
463 umull v18.8h, v23.8b, v7.8b //mul (row 7)
[all …]
Dihevc_intra_pred_chroma_mode_3_to_9.s189 umull v24.8h, v25.8b, v7.8b //mul (row 0)
199 umull v22.8h, v16.8b, v7.8b //mul (row 1)
210 umull v20.8h, v14.8b, v7.8b //mul (row 2)
221 umull v18.8h, v19.8b, v7.8b //mul (row 3)
232 umull v24.8h, v25.8b, v7.8b //mul (row 4)
245 umull v22.8h, v16.8b, v7.8b //mul (row 5)
256 umull v20.8h, v14.8b, v7.8b //mul (row 6)
260 umull v18.8h, v19.8b, v7.8b //mul (row 7)
323 umull v20.8h, v14.8b, v7.8b //mul (row 6)
351 umull v18.8h, v19.8b, v7.8b //mul (row 7)
[all …]
Dihevc_inter_pred_filters_luma_vert_w16out.s121 umull v19.8h, v1.8b, v23.8b //mul_res1 = vmull_u8(src_tmp2, coeffabs_1)//
140 umull v20.8h, v2.8b, v23.8b //mul_res2 = vmull_u8(src_tmp3, coeffabs_1)//
165 umull v21.8h, v3.8b, v23.8b
182 umull v30.8h, v4.8b, v23.8b
207 umull v19.8h, v1.8b, v23.8b //mul_res1 = vmull_u8(src_tmp2, coeffabs_1)//
234 umull v20.8h, v2.8b, v23.8b //mul_res2 = vmull_u8(src_tmp3, coeffabs_1)//
259 umull v21.8h, v3.8b, v23.8b
287 umull v30.8h, v4.8b, v23.8b
315 umull v19.8h, v1.8b, v23.8b //mul_res1 = vmull_u8(src_tmp2, coeffabs_1)//
328 umull v20.8h, v2.8b, v23.8b //mul_res2 = vmull_u8(src_tmp3, coeffabs_1)//
[all …]
Dihevc_intra_pred_filters_chroma_mode_11_to_17.s311 umull v24.8h, v12.8b, v7.8b //mul (row 0)
321 umull v22.8h, v16.8b, v7.8b //mul (row 1)
332 umull v20.8h, v14.8b, v7.8b //mul (row 2)
343 umull v18.8h, v23.8b, v7.8b //mul (row 3)
354 umull v24.8h, v12.8b, v7.8b //mul (row 4)
367 umull v22.8h, v16.8b, v7.8b //mul (row 5)
378 umull v20.8h, v14.8b, v7.8b //mul (row 6)
382 umull v18.8h, v23.8b, v7.8b //mul (row 7)
448 umull v20.8h, v14.8b, v7.8b //mul (row 6)
479 umull v18.8h, v23.8b, v7.8b //mul (row 7)
[all …]
Dihevc_inter_pred_filters_luma_vert.s164 umull v19.8h, v1.8b, v23.8b //mul_res1 = vmull_u8(src_tmp2, coeffabs_1)//
182 umull v20.8h, v2.8b, v23.8b //mul_res2 = vmull_u8(src_tmp3, coeffabs_1)//
212 umull v21.8h, v3.8b, v23.8b
228 umull v30.8h, v4.8b, v23.8b
253 umull v19.8h, v1.8b, v23.8b //mul_res1 = vmull_u8(src_tmp2, coeffabs_1)//
281 umull v20.8h, v2.8b, v23.8b //mul_res2 = vmull_u8(src_tmp3, coeffabs_1)//
307 umull v21.8h, v3.8b, v23.8b
337 umull v30.8h, v4.8b, v23.8b
365 umull v19.8h, v1.8b, v23.8b //mul_res1 = vmull_u8(src_tmp2, coeffabs_1)//
378 umull v20.8h, v2.8b, v23.8b //mul_res2 = vmull_u8(src_tmp3, coeffabs_1)//
[all …]
Dihevc_intra_pred_chroma_planar.s187 umull v12.8h, v5.8b, v0.8b //(row+1) * src[nt-1]
198 umull v28.8h, v5.8b, v0.8b
210 umull v26.8h, v18.8b, v0.8b //(row+1) * src[nt-1]
223 umull v24.8h, v18.8b, v0.8b
236 umull v22.8h, v5.8b, v0.8b //(row+1) * src[nt-1]
245 umull v20.8h, v5.8b, v0.8b
257 umull v12.8h, v18.8b, v0.8b //(row+1) * src[nt-1]
268 umull v28.8h, v18.8b, v0.8b
353 umull v12.8h, v5.8b, v0.8b //(row+1) * src[nt-1]
Dihevc_inter_pred_luma_horz_w16out.s276 … umull v8.8h, v1.8b, v25.8b //arithmetic operations for ii iteration in the same time
339 … umull v8.8h, v1.8b, v25.8b //arithmetic operations for ii iteration in the same time
415 umull v8.8h, v1.8b, v25.8b //mul_res = vmlal_u8(src[0_1], coeffabs_1)//
432 umull v10.8h, v15.8b, v27.8b //mul_res = vmull_u8(src[0_3], coeffabs_3)//
507 umull v8.8h, v2.8b, v25.8b //mul_res = vmlal_u8(src[0_1], coeffabs_1)//
527 umull v20.8h, v3.8b, v25.8b
558 umull v10.8h, v2.8b, v25.8b //mul_res = vmlal_u8(src[0_1], coeffabs_1)//
589 umull v22.8h, v3.8b, v25.8b
625 umull v8.8h, v2.8b, v25.8b //mul_res = vmlal_u8(src[0_1], coeffabs_1)//
Dihevc_inter_pred_filters_luma_horz.s229 umull v8.8h, v1.8b, v25.8b //mul_res = vmlal_u8(src[0_1], coeffabs_1)//
246 umull v10.8h, v15.8b, v27.8b //mul_res = vmull_u8(src[0_3], coeffabs_3)//
319 umull v8.8h, v2.8b, v25.8b //mul_res = vmlal_u8(src[0_1], coeffabs_1)//
339 umull v20.8h, v3.8b, v25.8b
376 umull v10.8h, v2.8b, v25.8b //mul_res = vmlal_u8(src[0_1], coeffabs_1)//
402 umull v22.8h, v3.8b, v25.8b
443 umull v8.8h, v2.8b, v25.8b //mul_res = vmlal_u8(src[0_1], coeffabs_1)//
572 … umull v8.8h, v1.8b, v25.8b //arithmetic operations for ii iteration in the same time
/external/libmpeg2/common/armv8/
Dicv_variance_av8.s86 umull v20.8h, v0.8b, v0.8b
87 umull v22.8h, v1.8b, v1.8b
88 umull v24.8h, v2.8b, v2.8b
89 umull v26.8h, v3.8b, v3.8b
/external/llvm/test/CodeGen/Thumb2/
Dthumb2-ldrd.ll8 ; CHECK: umull
/external/llvm/test/CodeGen/AArch64/
Daarch64-smull.ll38 ; CHECK: umull {{v[0-9]+}}.8h, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
49 ; CHECK: umull {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
60 ; CHECK: umull {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
262 ; CHECK: umull {{v[0-9]+}}.8h, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
280 ; CHECK: umull {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
288 ; CHECK: umull {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
308 ; CHECK: umull [[REG1:(v[0-9]+.8h)]], {{v[0-9]+}}.8b, [[REG2:(v[0-9]+.8b)]]
Darm64-neon-2velem-high.ll65 …%vmull15.i.i = call <4 x i32> @llvm.aarch64.neon.umull.v4i32(<4 x i16> %shuffle.i.i, <4 x i16> %ve…
76 …%vmull15.i.i = call <4 x i32> @llvm.aarch64.neon.umull.v4i32(<4 x i16> %shuffle.i.i, <4 x i16> <i1…
89 …%vmull9.i.i = call <2 x i64> @llvm.aarch64.neon.umull.v2i64(<2 x i32> %shuffle.i.i, <2 x i32> %vec…
100 …%vmull9.i.i = call <2 x i64> @llvm.aarch64.neon.umull.v2i64(<2 x i32> %shuffle.i.i, <2 x i32> <i32…
219 …%vmull2.i.i.i = call <4 x i32> @llvm.aarch64.neon.umull.v4i32(<4 x i16> %shuffle.i.i, <4 x i16> %v…
231 …%vmull2.i.i.i = call <4 x i32> @llvm.aarch64.neon.umull.v4i32(<4 x i16> %shuffle.i.i, <4 x i16> <i…
245 …%vmull2.i.i.i = call <2 x i64> @llvm.aarch64.neon.umull.v2i64(<2 x i32> %shuffle.i.i, <2 x i32> %v…
257 …%vmull2.i.i.i = call <2 x i64> @llvm.aarch64.neon.umull.v2i64(<2 x i32> %shuffle.i.i, <2 x i32> <i…
381 …%vmull2.i.i.i = call <4 x i32> @llvm.aarch64.neon.umull.v4i32(<4 x i16> %shuffle.i.i, <4 x i16> %v…
393 …%vmull2.i.i.i = call <4 x i32> @llvm.aarch64.neon.umull.v4i32(<4 x i16> %shuffle.i.i, <4 x i16> <i…
[all …]

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