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Searched refs:uqshl (Results 1 – 22 of 22) sorted by relevance

/external/llvm/test/MC/AArch64/
Dneon-saturating-shift.s28 uqshl v0.8b, v1.8b, v2.8b
29 uqshl v0.16b, v1.16b, v2.16b
30 uqshl v0.4h, v1.4h, v2.4h
31 uqshl v0.8h, v1.8h, v2.8h
32 uqshl v0.2s, v1.2s, v2.2s
33 uqshl v0.4s, v1.4s, v2.4s
34 uqshl v0.2d, v1.2d, v2.2d
Dneon-scalar-saturating-shift.s19 uqshl b0, b1, b2
20 uqshl h10, h11, h12
21 uqshl s20, s21, s2
22 uqshl d17, d31, d8
Dneon-scalar-shift-imm.s84 uqshl b18, b15, #6
85 uqshl h11, h18, #7
86 uqshl s14, s19, #18
87 uqshl d15, d12, #19
Dneon-simd-shift.s242 uqshl v0.8b, v1.8b, #3
243 uqshl v0.4h, v1.4h, #3
244 uqshl v0.2s, v1.2s, #3
245 uqshl v0.16b, v1.16b, #3
246 uqshl v0.8h, v1.8h, #3
247 uqshl v0.4s, v1.4s, #3
248 uqshl v0.2d, v1.2d, #3
Darm64-advsimd.s366 uqshl.8b v0, v0, v0
437 ; CHECK: uqshl.8b v0, v0, v0 ; encoding: [0x00,0x4c,0x20,0x2e]
1385 uqshl b0, b0, #1
1386 uqshl h0, h0, #2
1387 uqshl s0, s0, #3
1388 uqshl d0, d0, #4 define
1434 ; CHECK: uqshl b0, b0, #1 ; encoding: [0x00,0x74,0x09,0x7f]
1435 ; CHECK: uqshl h0, h0, #2 ; encoding: [0x00,0x74,0x12,0x7f]
1436 ; CHECK: uqshl s0, s0, #3 ; encoding: [0x00,0x74,0x23,0x7f]
1437 ; CHECK: uqshl d0, d0, #4 ; encoding: [0x00,0x74,0x44,0x7f]
[all …]
Dneon-diagnostics.s930 uqshl v1.8b, v25.4h, v6.8h
987 uqshl h0, b1, h0
989 uqshl d0, b1, d0 define
1774 uqshl v0.8b, v1.8h, #3
1775 uqshl v0.4h, v1.4s, #3
1776 uqshl v0.2s, v1.2d, #3
1777 uqshl v0.16b, v1.16b, #8
1778 uqshl v0.8h, v1.8h, #16
1779 uqshl v0.4s, v1.4s, #32
1780 uqshl v0.2d, v1.2d, #64
[all …]
/external/llvm/test/CodeGen/AArch64/
Darm64-sqshl-uqshl-i64Contant.ll3 ; Check if sqshl/uqshl with constant shift amout can be selected.
13 ; CHECK: uqshl {{d[0-9]+}}, {{d[0-9]+}}, #36
14 %1 = tail call i64 @llvm.aarch64.neon.uqshl.i64(i64 %a, i64 36)
18 declare i64 @llvm.aarch64.neon.uqshl.i64(i64, i64)
Darm64-vshift.ll32 ;CHECK: uqshl.8b
35 %tmp3 = call <8 x i8> @llvm.aarch64.neon.uqshl.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
41 ;CHECK: uqshl.4h
44 %tmp3 = call <4 x i16> @llvm.aarch64.neon.uqshl.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
50 ;CHECK: uqshl.2s
53 %tmp3 = call <2 x i32> @llvm.aarch64.neon.uqshl.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
95 ;CHECK: uqshl.16b
98 %tmp3 = call <16 x i8> @llvm.aarch64.neon.uqshl.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
104 ;CHECK: uqshl.8h
107 %tmp3 = call <8 x i16> @llvm.aarch64.neon.uqshl.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
[all …]
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt401 # CHECK: uqshl v2.16b, v14.16b, v23.16b
403 # CHECK: uqshl v4.8h, v12.8h, v25.8h
405 # CHECK: uqshl v6.4s, v10.4s, v27.4s
406 # CHECK: uqshl v0.2d, v1.2d, v2.2d
463 # CHECK: uqshl s23, s20, s16
465 # CHECK: uqshl b11, b20, b30
936 # CHECK: uqshl v0.8b, v1.8b, #3
937 # CHECK: uqshl v0.4h, v1.4h, #3
938 # CHECK: uqshl v0.2s, v1.2s, #3
939 # CHECK: uqshl v0.16b, v1.16b, #3
[all …]
Darm64-advsimd.txt349 # CHECK: uqshl.8b v0, v0, v0
1838 # CHECK: uqshl b0, b0, #1
1839 # CHECK: uqshl h0, h0, #2
1840 # CHECK: uqshl s0, s0, #3
1841 # CHECK: uqshl d0, d0, #4
2150 # CHECK: uqshl.8b v0, v0, #1
2151 # CHECK: uqshl.16b v0, v0, #2
2152 # CHECK: uqshl.4h v0, v0, #3
2153 # CHECK: uqshl.8h v0, v0, #4
2154 # CHECK: uqshl.2s v0, v0, #5
[all …]
/external/valgrind/none/tests/arm64/
Dfp_and_simd.stdout.exp28068 uqshl d1, d2, d4 5607a7e98220ab58520b335d72cc040e f553b5d1e6b5011515bb68093ca47825 adbeb6a82b6f…
28069 uqshl s1, s2, s4 9a7ab0c2445151cad8ff163ebabee270 698a4ffaa34cae8c260debd723ff7551 ca777355cd5b…
28070 uqshl h1, h2, h4 149b9f9292cfafbfd8d95b6782a72796 a99df516237fd9a387b3372a00dede9e c8b9e174e6b0…
28071 uqshl b1, b2, b4 b81f0b9b28a2a68ebec131f7191556c1 ac1965793cc38a7a8ea7e54431f6cf86 dc1823290e89…
28088 uqshl v1.2d, v2.2d, v4.2d 6244e0cc635cbb04e0875e5b68de5715 843dd284cbf00ae257ae9daee36a0630 0…
28089 uqshl v1.4s, v2.4s, v4.4s 6cec6042ea83890fbe978d95ee35dc13 8c8ba9024b4f541aeddd936e65db7e00 c…
28090 uqshl v1.2s, v2.2s, v4.2s 3b4725c4ab9d8e52e5d4be6ce46983cb 6d39690abb6f1a2822266f884d37a069 f…
28091 uqshl v1.8h, v2.8h, v4.8h 2cdc7711dea58141799d16f2dd510e1d 921c6083fed55fca9c03b09a5d67f551 1…
28092 uqshl v1.4h, v2.4h, v4.4h cd09388a7a44ac9977566c9f5bfd6ed1 aa74ba735dc419ce6e82af5c4164fb76 2…
28093 uqshl v1.16b, v2.16b, v4.16b 53520ee952a0bf649f65558409106338 3e184f472fbd82623fc4a693cd569dad …
[all …]
/external/libavc/common/armv8/
Dih264_intra_pred_luma_16x16_av8.s334 uqshl v0.8h, v0.8h, v20.8h
/external/libavc/encoder/armv8/
Dih264e_evaluate_intra16x16_modes_av8.s140 uqshl v0.8h, v0.8h, v20.8h
/external/vixl/test/
Dtest-simulator-a64.cc3758 DEFINE_TEST_NEON_3SAME(uqshl, Basic)
3811 DEFINE_TEST_NEON_3SAME_SCALAR(uqshl, Basic)
3892 DEFINE_TEST_NEON_2OPIMM(uqshl, Basic, TypeWidthFromZero) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
3922 DEFINE_TEST_NEON_2OPIMM_SCALAR(uqshl, Basic, TypeWidthFromZero) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
/external/vixl/src/vixl/a64/
Dmacro-assembler-a64.h2225 V(uqshl, Uqshl) \
2425 V(uqshl, Uqshl) \
Dassembler-a64.h2564 void uqshl(const VRegister& vd,
2936 void uqshl(const VRegister& vd,
Dsimulator-a64.cc3665 case NEON_UQSHL_imm_scalar: uqshl(vf, rd, rn, left_shift); break; in VisitNEONScalarShiftImmediate()
3739 case NEON_UQSHL_imm: uqshl(vf, rd, rn, left_shift); break; in VisitNEONShiftImmediate()
Dsimulator-a64.h2034 LogicVRegister uqshl(VectorFormat vform,
Dassembler-a64.cc3253 V(uqshl, NEON_UQSHL, true) \
4252 void Assembler::uqshl(const VRegister& vd, in uqshl() function in vixl::Assembler
Dlogic-a64.cc1708 LogicVRegister Simulator::uqshl(VectorFormat vform, in uqshl() function in vixl::Simulator
/external/vixl/doc/
Dsupported-instructions.md4393 void uqshl(const VRegister& vd,
4402 void uqshl(const VRegister& vd,
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td2937 defm UQSHL : SIMDThreeSameVector<1,0b01001,"uqshl", int_aarch64_neon_uqshl>;
3191 defm UQSHL : SIMDThreeScalarBHSD<1, 0b01001, "uqshl", int_aarch64_neon_uqshl>;
4640 defm UQSHL : SIMDScalarLShiftBHSD<1, 0b01110, "uqshl", AArch64uqshli>;
4696 defm UQSHL : SIMDVectorLShiftBHSD<1, 0b01110, "uqshl", AArch64uqshli>;