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/external/libunwind_llvm/src/
DRegisters.hpp26 struct v128 { uint32_t vec[4]; }; struct
43 v128 getVectorRegister(int num) const;
44 void setVectorRegister(int num, v128 value);
208 inline v128 Registers_x86::getVectorRegister(int) const { in getVectorRegister()
212 inline void Registers_x86::setVectorRegister(int, v128) { in setVectorRegister() argument
231 v128 getVectorRegister(int num) const;
232 void setVectorRegister(int num, v128 value);
456 inline v128 Registers_x86_64::getVectorRegister(int) const { in getVectorRegister()
460 inline void Registers_x86_64::setVectorRegister(int, v128) { in setVectorRegister() argument
479 v128 getVectorRegister(int num) const;
[all …]
/external/llvm/test/CodeGen/X86/
Dfp128-i128.ll208 @v128 = common global i128 0, align 16
212 ; unsigned __int128 v128, v128_2;
214 ; v128 = ((v128 << 96) | v128_2);
218 %0 = load i128, i128* @v128, align 16
222 store i128 %or, i128* @v128, align 16
225 ; CHECK: movq v128(%rip), %rax
229 ; CHECK-NEXT: movq %rcx, v128(%rip)
230 ; CHECK-NEXT: movq %rax, v128+8(%rip)
Dvariadic-node-pic.ll3 …i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:…
D2007-10-28-inlineasm-q-modifier.ll3 …i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:…
/external/llvm/test/Assembler/
Dinvalid-datalayout22.ll3 target datalayout = "v128:0:128"
D2008-07-10-APInt.ll4 …i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80…
/external/llvm/test/CodeGen/PowerPC/
Dpr13641.ll2 … "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
Dlongdbl-truncate.ll2 …i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f12…
Dppc64-zext.ll2 … "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
Dppc64-cyclecounter.ll1 … "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
Dunaligned.ll2 …i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f12…
4 …i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f12…
/external/llvm/test/CodeGen/NVPTX/
Dmodule-inline-asm.ll3 …16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
/external/llvm/test/CodeGen/ARM/
D2011-07-10-GlobalMergeBug.ll2 …1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32"
D2009-09-09-AllOnes.ll2 …2-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
Dmetadata-short-enums.ll3 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-n32-S64"
Dmetadata-short-wchar.ll3 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-n32-S64"
Dpr25317.ll3 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
Dmetadata-default.ll3 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-n32-S64"
D2012-08-08-legalize-unaligned.ll4 …i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32"
/external/llvm/test/Linker/
D2008-03-05-AliasReference2.ll5 …i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:…
/external/llvm/test/CodeGen/Mips/
D2008-08-07-CC.ll5 "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:1…
/external/llvm/test/MC/ELF/
Dbss.ll4 …i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80…
/external/llvm/test/LTO/ARM/
Dinline-asm.ll6 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
/external/llvm/test/Transforms/InstCombine/
Dconstant-fold-compare.ll2 …i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80…
D2007-12-12-GEPScale.ll3 …i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80…

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