| /external/clang/test/CodeGen/ |
| D | systemz-abi-vector.c | 12 typedef __attribute__((vector_size(2))) char v2i8; typedef
46 v2i8 pass_v2i8(v2i8 arg) { return arg; } in pass_v2i8()
138 struct agg_v2i8 { v2i8 a; };
221 v2i8 va_v2i8(__builtin_va_list l) { return __builtin_va_arg(l, v2i8); } in va_v2i8()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64TargetTransformInfo.cpp | 223 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
226 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
247 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 }, in getCastInstrCost()
250 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 }, in getCastInstrCost()
266 { ISD::FP_TO_SINT, MVT::v2i8, MVT::v2f32, 1 }, in getCastInstrCost()
269 { ISD::FP_TO_UINT, MVT::v2i8, MVT::v2f32, 1 }, in getCastInstrCost()
280 { ISD::FP_TO_SINT, MVT::v2i8, MVT::v2f64, 2 }, in getCastInstrCost()
283 { ISD::FP_TO_UINT, MVT::v2i8, MVT::v2f64, 2 }, in getCastInstrCost()
|
| /external/llvm/include/llvm/CodeGen/ |
| D | MachineValueType.h | 69 v2i8 = 22, // 2 x i8 enumerator
221 return (SimpleTy == MVT::v2i8 || SimpleTy == MVT::v1i16 || in is16BitVector()
319 case v2i8: in getVectorElementType()
405 case v2i8: in getVectorNumElements()
450 case v2i8: in getSizeInBits()
597 if (NumElements == 2) return MVT::v2i8; in getVectorVT()
|
| D | ValueTypes.td | 46 def v2i8 : ValueType<16 , 22>; // 2 x i8 vector value
|
| /external/llvm/test/CodeGen/Hexagon/vect/ |
| D | vect-load-1.ll | 2 …16f76e0<LD2[undef](align=8), sext from v2i8>", 0x16c5890, 0x16f76e0, 0x16f76e0<LD2[undef](align=8)…
|
| /external/llvm/test/CodeGen/ARM/ |
| D | 2012-08-23-legalize-vmull.ll | 26 ; v2i8
70 ; v2i8
120 ; v2i8
121 ; v2i8 x v2i16
|
| D | cttz_vector.ll | 6 declare <2 x i8> @llvm.cttz.v2i8(<2 x i8>, i1)
36 %tmp = call <2 x i8> @llvm.cttz.v2i8(<2 x i8> %a, i1 false)
220 %tmp = call <2 x i8> @llvm.cttz.v2i8(<2 x i8> %a, i1 true)
|
| /external/llvm/test/CodeGen/SystemZ/ |
| D | vec-const-01.ll | 57 ; Test an all-zeros v2i8 that gets promoted to v16i8.
65 ; Test a mixed v2i8 that gets promoted to v16i8 (mask 0x8000).
|
| D | vec-shift-07.ll | 82 ; Test a v2i8->v2i64 extension.
112 ; Test an alternative v2i8->v2i64 extension.
142 ; Test an extraction-based v2i8->v2i64 extension.
|
| D | vec-move-01.ll | 53 ; Test v2i8 moves.
|
| D | vec-move-16.ll | 71 ; Test a v2i8->v2i64 extension.
|
| D | vec-move-15.ll | 71 ; Test a v2i8->v2i64 extension.
|
| D | vec-and-03.ll | 82 ; Test a v2i8->v2i64 extension.
|
| D | vec-move-17.ll | 71 ; Test a v2i64->v2i8 truncation. At the moment we use a VPERM rather than
|
| D | vec-move-03.ll | 113 ; Test v2i8 stores.
|
| D | vec-move-02.ll | 113 ; Test v2i8 loads.
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| D | vec-sub-01.ll | 89 ; Test a v2i8 subtraction, which gets promoted to v16i8.
|
| /external/llvm/include/llvm/IR/ |
| D | IntrinsicsNVVM.td | 1871 "llvm.nvvm.suld.1d.v2i8.clamp">;
1916 "llvm.nvvm.suld.1d.array.v2i8.clamp">;
1961 "llvm.nvvm.suld.2d.v2i8.clamp">;
2006 "llvm.nvvm.suld.2d.array.v2i8.clamp">;
2051 "llvm.nvvm.suld.3d.v2i8.clamp">;
2097 "llvm.nvvm.suld.1d.v2i8.trap">;
2142 "llvm.nvvm.suld.1d.array.v2i8.trap">;
2187 "llvm.nvvm.suld.2d.v2i8.trap">;
2232 "llvm.nvvm.suld.2d.array.v2i8.trap">;
2277 "llvm.nvvm.suld.3d.v2i8.trap">;
[all …]
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMTargetTransformInfo.cpp | 106 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
107 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
138 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 }, in getCastInstrCost()
139 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 }, in getCastInstrCost()
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDILISelLowering.cpp | 57 (int)MVT::v2i8, in InitAMDILLowering()
85 (int)MVT::v2i8, in InitAMDILLowering()
207 setOperationAction(ISD::UDIV, MVT::v2i8, Expand); in InitAMDILLowering()
648 if (OVT == MVT::v2i8) { in LowerSREM8()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfoVector.td | 405 // Sign extends a v2i8 into a v2i32.
406 def: Pat<(v2i32 (sext_inreg V2I32:$Rs, v2i8)),
509 // Zero and sign extended load from v2i8 into v2i16.
511 [{ return cast<LoadSDNode>(N)->getMemoryVT() == MVT::v2i8; }]>;
514 [{ return cast<LoadSDNode>(N)->getMemoryVT() == MVT::v2i8; }]>;
|
| /external/llvm/lib/IR/ |
| D | ValueTypes.cpp | 149 case MVT::v2i8: return "v2i8"; in getEVTString()
227 case MVT::v2i8: return VectorType::get(Type::getInt8Ty(Context), 2); in getTypeForEVT()
|
| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXVector.td | 41 // Extract v2i8
46 (v2i8 V2I8Regs:$src), imm:$c))],
107 // Insert v2i8
797 def : Pat<(v2i8 (vec_shuf:$op V2I8Regs:$src1, V2I8Regs:$src2)),
888 def : Pat<(v2i8 (extract_subvec V4I8Regs:$src, 0)),
891 def : Pat<(v2i8 (extract_subvec V4I8Regs:$src, 2)),
1263 // v2i8 -> i16
1287 // i16 -> v2i8
|
| /external/llvm/utils/TableGen/ |
| D | CodeGenTarget.cpp | 82 case MVT::v2i8: return "MVT::v2i8"; in getEnumName()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 136 setTruncStoreAction(MVT::v2i32, MVT::v2i8, Custom); in AMDGPUTargetLowering()
191 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i8, Expand); in AMDGPUTargetLowering()
192 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i8, Expand); in AMDGPUTargetLowering()
193 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::v2i8, Expand); in AMDGPUTargetLowering()
|