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Searched refs:v512i1 (Results 1 – 8 of 8) sorted by relevance

/external/llvm/lib/Target/Hexagon/
DHexagonIntrinsicsV60.td82 def : Pat <(v512i1 (bitconvert (v16i32 VectorRegs:$src1))),
83 (v512i1 (V6_vandvrt(v16i32 VectorRegs:$src1),
87 def : Pat <(v512i1 (bitconvert (v32i16 VectorRegs:$src1))),
88 (v512i1 (V6_vandvrt(v32i16 VectorRegs:$src1),
92 def : Pat <(v512i1 (bitconvert (v64i8 VectorRegs:$src1))),
93 (v512i1 (V6_vandvrt(v64i8 VectorRegs:$src1),
97 def : Pat <(v512i1 (bitconvert (v8i64 VectorRegs:$src1))),
98 (v512i1 (V6_vandvrt(v8i64 VectorRegs:$src1),
102 def : Pat <(v16i32 (bitconvert (v512i1 VecPredRegs:$src1))),
103 (v16i32 (V6_vandqrt(v512i1 VecPredRegs:$src1),
[all …]
DHexagonISelLowering.cpp198 LocVT == MVT::v64i8 || LocVT == MVT::v512i1) { in CC_Hexagon_VarArg()
338 LocVT == MVT::v64i8 || LocVT == MVT::v512i1)) { in CC_HexagonVector()
411 LocVT == MVT::v512i1) { in RetCC_Hexagon()
550 ty == MVT::v512i1 || ty == MVT::v1024i1); in IsHvxVectorType()
1110 } else if (RegVT == MVT::v512i1 || RegVT == MVT::v1024i1) { in LowerFormalArguments()
1574 addRegisterClass(MVT::v512i1, &Hexagon::VecPredRegsRegClass); in HexagonTargetLowering()
2669 case MVT::v512i1: in getRegForInlineAsmConstraint()
DHexagonRegisterInfo.td232 def VecPredRegs : RegisterClass<"Hexagon", [v512i1], 512,
/external/llvm/include/llvm/CodeGen/
DMachineValueType.h65 v512i1 = 19, // 512 x i1 enumerator
258 SimpleTy == MVT::v512i1 || SimpleTy == MVT::v64i8 || in is512BitVector()
316 case v512i1: in getVectorElementType()
369 case v512i1: return 512; in getVectorNumElements()
489 case v512i1: in getSizeInBits()
592 if (NumElements == 512) return MVT::v512i1; in getVectorVT()
DValueTypes.td42 def v512i1 : ValueType<512, 19>; // 512 x i8 vector value
/external/llvm/lib/IR/
DValueTypes.cpp146 case MVT::v512i1: return "v512i1"; in getEVTString()
224 case MVT::v512i1: return VectorType::get(Type::getInt1Ty(Context), 512); in getTypeForEVT()
/external/llvm/utils/TableGen/
DCodeGenTarget.cpp79 case MVT::v512i1: return "MVT::v512i1"; in getEnumName()
/external/llvm/include/llvm/IR/
DIntrinsics.td164 def llvm_v512i1_ty : LLVMType<v512i1>; // 512 x i1