/external/llvm/test/CodeGen/NVPTX/ |
D | mulwide.ll | 9 %val0 = sext i16 %a to i32 11 %val2 = mul i32 %val0, %val1 20 %val0 = zext i16 %a to i32 22 %val2 = mul i32 %val0, %val1 31 %val0 = sext i8 %a to i32 33 %val2 = mul i32 %val0, %val1 42 %val0 = zext i8 %a to i32 44 %val2 = mul i32 %val0, %val1 53 %val0 = sext i32 %a to i64 55 %val2 = mul i64 %val0, %val1 [all …]
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D | bfe.ll | 9 %val0 = ashr i32 %a, 4 10 %val1 = and i32 %val0, 15 19 %val0 = ashr i32 %a, 3 20 %val1 = and i32 %val0, 7 29 %val0 = ashr i32 %a, 5 30 %val1 = and i32 %val0, 7
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D | shift-parts.ll | 17 %val0 = shl i128 %a, %amt 18 store i128 %val0, i128* %val 35 %val0 = ashr i128 %a, %amt 36 store i128 %val0, i128* %val
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/external/deqp/data/gles31/shaders/ |
D | linkage_tessellation_uniform_types.test | 9 uniform float val0 = -1.25; 27 tc_out[gl_InvocationID] = val0; 61 uniform vec2 val0 = [ vec2(-1.25, 1.25) ]; 79 tc_out[gl_InvocationID] = val0; 113 uniform vec3 val0 = [ vec3(-1.25, 1.25, -9.5) ]; 131 tc_out[gl_InvocationID] = val0; 165 uniform vec4 val0 = [ vec4(-1.25, 1.25, -9.5, -12.2) ]; 183 tc_out[gl_InvocationID] = val0; 217 uniform mat2 val0 = [ mat2(-1.25, 1.25, -9.5, -12.2) ]; 235 tc_out[gl_InvocationID] = val0; [all …]
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/external/libvpx/libvpx/vpx_dsp/mips/ |
D | intrapred_msa.c | 155 uint32_t val0, val1; in intra_predict_dc_4x4_msa() local 161 val0 = LW(src_top); in intra_predict_dc_4x4_msa() 163 INSERT_W2_SB(val0, val1, src); in intra_predict_dc_4x4_msa() 169 val0 = __msa_copy_u_w((v4i32)store, 0); in intra_predict_dc_4x4_msa() 171 SW4(val0, val0, val0, val0, dst, dst_stride); in intra_predict_dc_4x4_msa() 176 uint32_t val0; in intra_predict_dc_tl_4x4_msa() local 181 val0 = LW(src); in intra_predict_dc_tl_4x4_msa() 182 data = (v16i8)__msa_insert_w((v4i32)data, 0, val0); in intra_predict_dc_tl_4x4_msa() 187 val0 = __msa_copy_u_w((v4i32)store, 0); in intra_predict_dc_tl_4x4_msa() 189 SW4(val0, val0, val0, val0, dst, dst_stride); in intra_predict_dc_tl_4x4_msa() [all …]
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/external/opencv/cv/src/ |
D | cvfloodfill.cpp | 102 int val0[] = {0,0,0}; in icvFloodFill_8u_CnIR() local 112 val0[0] = img[L]; in icvFloodFill_8u_CnIR() 117 while( ++R < roi.width && img[R] == val0[0] ) in icvFloodFill_8u_CnIR() 120 while( --L >= 0 && img[L] == val0[0] ) in icvFloodFill_8u_CnIR() 126 ICV_SET_C3( val0, img + L*3 ); in icvFloodFill_8u_CnIR() 131 while( --L >= 0 && ICV_EQ_C3( img + L*3, val0 )) in icvFloodFill_8u_CnIR() 134 while( ++R < roi.width && ICV_EQ_C3( img + R*3, val0 )) in icvFloodFill_8u_CnIR() 177 if( (unsigned)i < (unsigned)roi.width && img[i] == val0[0] ) in icvFloodFill_8u_CnIR() 181 while( --j >= 0 && img[j] == val0[0] ) in icvFloodFill_8u_CnIR() 184 while( ++i < roi.width && img[i] == val0[0] ) in icvFloodFill_8u_CnIR() [all …]
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D | cvcalccontrasthistogram.cpp | 123 int val0 = chdims[t + 128]; 125 array[val0] += MIN( t - v1_r, v2_r - t ); 126 n[val0]++; 137 int val0 = chdims[t + 128]; 139 array[val0] += MIN( t - v1_d, v2_d - t ); 140 n[val0]++; 243 int val0 = chdims[t + 128]; 245 array[val0] += MIN( t - v1_r, v2_r - t ); 246 n[val0]++; 261 int val0 = chdims[t + 128]; [all …]
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/external/llvm/test/CodeGen/AMDGPU/ |
D | ds_read2_superreg.ll | 18 %val0 = load <2 x float>, <2 x float> addrspace(3)* %arrayidx0, align 4 20 store <2 x float> %val0, <2 x float> addrspace(1)* %out.gep 32 %val0 = load <2 x float>, <2 x float> addrspace(3)* %arrayidx0 34 store <2 x float> %val0, <2 x float> addrspace(1)* %out.gep 49 %val0 = load <4 x float>, <4 x float> addrspace(3)* %arrayidx0, align 4 50 %elt0 = extractelement <4 x float> %val0, i32 0 51 %elt1 = extractelement <4 x float> %val0, i32 1 52 %elt2 = extractelement <4 x float> %val0, i32 2 53 %elt3 = extractelement <4 x float> %val0, i32 3 74 %val0 = load <3 x float>, <3 x float> addrspace(3)* %arrayidx0, align 4 [all …]
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D | annotate-kernel-features.ll | 37 %val0 = call i32 @llvm.r600.read.tgid.y() 38 store volatile i32 %val0, i32 addrspace(1)* %ptr 46 %val0 = call i32 @llvm.r600.read.tgid.x() 48 store volatile i32 %val0, i32 addrspace(1)* %ptr 62 %val0 = call i32 @llvm.r600.read.tgid.x() 64 store volatile i32 %val0, i32 addrspace(1)* %ptr 71 %val0 = call i32 @llvm.r600.read.tgid.y() 73 store volatile i32 %val0, i32 addrspace(1)* %ptr 80 %val0 = call i32 @llvm.r600.read.tgid.x() 83 store volatile i32 %val0, i32 addrspace(1)* %ptr [all …]
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D | ds_read2st64.ll | 16 %val0 = load float, float addrspace(3)* %arrayidx0, align 4 20 %sum = fadd float %val0, %val1 36 %val0 = load float, float addrspace(3)* %arrayidx0, align 4 40 %sum = fadd float %val0, %val1 56 %val0 = load float, float addrspace(3)* %arrayidx0, align 4 60 %sum = fadd float %val0, %val1 76 %val0 = load float, float addrspace(3)* %arrayidx0, align 4 80 %sum = fadd float %val0, %val1 92 %val0 = load float, float addrspace(3)* %arrayidx0, align 4 96 %sum = fadd float %val0, %val1 [all …]
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D | ds_read2.ll | 18 %val0 = load float, float addrspace(3)* %arrayidx0, align 4 22 %sum = fadd float %val0, %val1 37 %val0 = load float, float addrspace(3)* %arrayidx0, align 4 41 %sum = fadd float %val0, %val1 55 %val0 = load float, float addrspace(3)* %arrayidx0, align 4 59 %sum = fadd float %val0, %val1 73 %val0 = load float, float addrspace(3)* %arrayidx0, align 4 78 %sum.0 = fadd float %val0, %val1 105 %val0 = load float, float addrspace(3)* %arrayidx0, align 4 110 %sum.0 = fadd float %val0, %val1 [all …]
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D | ds_write2.ll | 34 %val0 = load float, float addrspace(1)* %in.gep.0, align 4 37 store float %val0, float addrspace(3)* %arrayidx0, align 4 53 %val0 = load float, float addrspace(1)* %in0.gep, align 4 56 store volatile float %val0, float addrspace(3)* %arrayidx0, align 4 72 %val0 = load float, float addrspace(1)* %in0.gep, align 4 75 store float %val0, float addrspace(3)* %arrayidx0, align 4 93 %val0 = load <2 x float>, <2 x float> addrspace(1)* %in.gep.0, align 8 95 %val0.0 = extractelement <2 x float> %val0, i32 0 98 store float %val0.0, float addrspace(3)* %arrayidx0, align 4 114 %val0 = extractelement <2 x float> %val, i32 0 [all …]
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D | split-scalar-i64-add.ll | 38 define void @imp_def_vcc_split_i64_add_1(i64 addrspace(1)* %out, i32 addrspace(1)* %in, i32 %val0, … 40 %vec.0 = insertelement <2 x i32> undef, i32 %val0, i32 0 51 define void @s_imp_def_vcc_split_i64_add_1(i64 addrspace(1)* %out, i32 %val0, i64 %val1) { 52 %vec.0 = insertelement <2 x i32> undef, i32 %val0, i32 0 64 define void @imp_def_vcc_split_i64_add_2(i64 addrspace(1)* %out, i32 addrspace(1)* %in, i32 %val0, … 68 %vec.0 = insertelement <2 x i32> undef, i32 %val0, i32 0
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/external/llvm/test/CodeGen/AArch64/ |
D | logical-imm.ll | 9 %val0 = and i32 %in32, 2863311530 10 store volatile i32 %val0, i32* @var32 31 %val0 = or i32 %in32, 2863311530 32 store volatile i32 %val0, i32* @var32 53 %val0 = xor i32 %in32, 2863311530 54 store volatile i32 %val0, i32* @var32 74 %val0 = add i32 %in32, 2863311530 75 store i32 %val0, i32* @var32
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D | dp-3source.ll | 3 define i32 @test_madd32(i32 %val0, i32 %val1, i32 %val2) { 6 %res = add i32 %val0, %mid 11 define i64 @test_madd64(i64 %val0, i64 %val1, i64 %val2) { 14 %res = add i64 %val0, %mid 19 define i32 @test_msub32(i32 %val0, i32 %val1, i32 %val2) { 22 %res = sub i32 %val0, %mid 27 define i64 @test_msub64(i64 %val0, i64 %val1, i64 %val2) { 30 %res = sub i64 %val0, %mid
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D | dag-combine-select.ll | 36 define void @test1(i32 %bitset, i32 %val0, i32 %val1) { 38 %cond = select i1 %cmp1, i32 %val0, i32 %val1 40 %cond11 = select i1 %cmp5, i32 %val0, i32 %val1 43 %cond17 = select i1 %or.cond, i32 %val0, i32 %val1
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/external/llvm/test/CodeGen/ARM/ |
D | aggregate-padding.ll | 39 %val0 = extractvalue [4 x i32] %arg, 0 41 %sum = add i32 %val0, %val3 74 %val0 = extractvalue [3 x i8] %arg, 0 76 %sum = add i8 %val0, %val2 84 %val0 = extractvalue [3 x i16] %arg, 0 86 %sum = add i16 %val0, %val2 97 %val0 = extractvalue [3 x i16] %arg, 0 99 %sum = add i16 %val0, %val2
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/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
D | nv50_ir_from_tgsi.cpp | 1659 Value *val0 = NULL; in handleLIT() local 1669 val0 = getScratch(); in handleLIT() 1670 mkOp2(OP_MAX, TYPE_F32, val0, fetchSrc(0, 0), zero); in handleLIT() 1672 mkMov(dst0[1], val0); in handleLIT() 1687 mkCmp(OP_SLCT, CC_GT, TYPE_F32, dst0[2], val3, zero, val0); in handleLIT() 1731 Value *val0, *val1; in handleInstruction() local 1807 val0 = getScratch(); in handleInstruction() 1808 mkOp1(OP_ABS, TYPE_F32, val0, src0); in handleInstruction() 1809 mkOp1(OP_RSQ, TYPE_F32, val0, val0); in handleInstruction() 1811 mkMov(dst0[c], val0); in handleInstruction() [all …]
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/external/llvm/test/CodeGen/SystemZ/ |
D | spill-01.ll | 47 %val0 = load i32 , i32 *%ptr0 57 store i32 %val0, i32 *%ptr0 85 %val0 = load i32 , i32 *%ptr0 97 store i32 %val0, i32 *%ptr0 127 %val0 = load i64 , i64 *%ptr0 139 store i64 %val0, i64 *%ptr0 173 %val0 = load float , float *%ptr0 186 store float %val0, float *%ptr0 217 %val0 = load double , double *%ptr0 230 store double %val0, double *%ptr0 [all …]
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D | vec-combine-02.ll | 6 define <8 x i16> @f1(<4 x i32> %val0, <4 x i32> %val1) { 10 %elem0 = extractelement <4 x i32> %val0, i32 0 11 %elem1 = extractelement <4 x i32> %val0, i32 1 12 %elem2 = extractelement <4 x i32> %val0, i32 2 13 %elem3 = extractelement <4 x i32> %val0, i32 3 45 define <8 x i16> @f2(<4 x i32> %val0, <4 x i32> %val1) { 49 %elem0 = extractelement <4 x i32> %val0, i32 0 50 %elem1 = extractelement <4 x i32> %val0, i32 1 51 %elem2 = extractelement <4 x i32> %val0, i32 2 52 %elem3 = extractelement <4 x i32> %val0, i32 3 [all …]
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/external/eigen/Eigen/src/Core/ |
D | Array.h | 145 EIGEN_STRONG_INLINE Array(const T0& val0, const T1& val1) 148 this->template _init2<T0,T1>(val0, val1); 158 Array(const Scalar& val0, const Scalar& val1); 162 EIGEN_STRONG_INLINE Array(const Scalar& val0, const Scalar& val1, const Scalar& val2) 166 m_storage.data()[0] = val0; 171 …EIGEN_STRONG_INLINE Array(const Scalar& val0, const Scalar& val1, const Scalar& val2, const Scalar… 175 m_storage.data()[0] = val0;
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/external/opencv/cvaux/src/ |
D | cvsegment.cpp | 100 int val0[3]; in icvSegmFloodFill_Stage1() local 107 val0[0] = img[seed.x*3]; in icvSegmFloodFill_Stage1() 108 val0[1] = img[seed.x*3 + 1]; in icvSegmFloodFill_Stage1() 109 val0[2] = img[seed.x*3 + 2]; in icvSegmFloodFill_Stage1() 111 while( DIFF( img + (R+1)*3, /*img + R*3*/val0 ) && !mask[R + 1] ) in icvSegmFloodFill_Stage1() 114 while( DIFF( img + (L-1)*3, /*img + L*3*/val0 ) && !mask[L - 1] ) in icvSegmFloodFill_Stage1() 152 if( !mask[i] && DIFF( img + i*3, /*img - curstep + i*3*/val0 )) in icvSegmFloodFill_Stage1() 156 while( !mask[j - 1] && DIFF( img + (j - 1)*3, /*img + j*3*/val0 )) in icvSegmFloodFill_Stage1() 160 (DIFF( img + (i+1)*3, /*img + i*3*/val0 ) || in icvSegmFloodFill_Stage1() 161 (DIFF( img + (i+1)*3, /*img + (i+1)*3 - curstep*/val0) && i < R))) in icvSegmFloodFill_Stage1()
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/external/opencv3/modules/imgproc/src/opencl/ |
D | bilateral.cl | 74 float_t val0 = convert_float_t(loadpix(src + src_index)); 76 int_t val0 = convert_int_t(loadpix(src + src_index)); 83 float diff = SUM(fabs(val - val0)); 86 int diff = SUM(abs(val - val0)); 110 float4 val0 = convert_float4(vload4(0, src + src_index)); 115 … float4 w = space_weight[k] * native_exp((val - val0) * (val - val0) * gauss_color_coeff);
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/external/opencv3/modules/ml/src/ |
D | inner_functions.cpp | 94 float val0 = responses.at<float>(si); in calcError() local 97 err += fabs(val - val0) > FLT_EPSILON; in calcError() 99 err += (val - val0)*(val - val0); in calcError()
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/external/opencv3/modules/imgproc/src/ |
D | floodfill.cpp | 144 _Tp val0 = img[L]; in floodFill_CnIR() local 147 while( ++R < roi.width && img[R] == val0 ) in floodFill_CnIR() 150 while( --L >= 0 && img[L] == val0 ) in floodFill_CnIR() 193 if( (unsigned)i < (unsigned)roi.width && img[i] == val0 ) in floodFill_CnIR() 197 while( --j >= 0 && img[j] == val0 ) in floodFill_CnIR() 200 while( ++i < roi.width && img[i] == val0 ) in floodFill_CnIR() 304 _Tp val0 = img[L]; in floodFillGrad_CnIR() local 308 while( !mask[R + 1] && diff( img + (R+1), &val0 )) in floodFillGrad_CnIR() 311 while( !mask[L - 1] && diff( img + (L-1), &val0 )) in floodFillGrad_CnIR() 364 if( !mask[i] && diff( img + i, &val0 )) in floodFillGrad_CnIR() [all …]
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