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/external/vixl/src/vixl/a64/
Dlogic-a64.cc2269 VectorFormat vformsrc = VectorFormatHalfWidthDoubleLanes(vform); in addlp() local
2277 sr[i] = src.Int(vformsrc, 2 * i) + src.Int(vformsrc, 2 * i + 1); in addlp()
2279 ur[i] = src.Uint(vformsrc, 2 * i) + src.Uint(vformsrc, 2 * i + 1); in addlp()
2512 VectorFormat vformsrc = VectorFormatDoubleWidth(VectorFormatHalfLanes(vform)); in shrn2() local
2514 LogicVRegister shifted_src = ushr(vformsrc, temp, src, shift); in shrn2()
2524 VectorFormat vformsrc = VectorFormatDoubleWidth(vform); in rshrn() local
2526 LogicVRegister shifted_src = ushr(vformsrc, temp, src, shift).Round(vformsrc); in rshrn()
2536 VectorFormat vformsrc = VectorFormatDoubleWidth(VectorFormatHalfLanes(vform)); in rshrn2() local
2538 LogicVRegister shifted_src = ushr(vformsrc, temp, src, shift).Round(vformsrc); in rshrn2()
2694 VectorFormat vformsrc = VectorFormatDoubleWidth(vform); in sqshrn() local
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