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Searched refs:vrinta (Results 1 – 25 of 25) sorted by relevance

/external/llvm/test/MC/ARM/
Dthumb-neon-v8.s56 vrinta.f32 d3, d0
57 @ CHECK: vrinta.f32 d3, d0 @ encoding: [0xba,0xff,0x00,0x35]
58 vrinta.f32 q8, q2
59 @ CHECK: vrinta.f32 q8, q2 @ encoding: [0xfa,0xff,0x44,0x05]
78 vrinta.f32.f32 d3, d0
79 @ CHECK: vrinta.f32 d3, d0 @ encoding: [0xba,0xff,0x00,0x35]
Dneon-v8.s56 vrinta.f32 d3, d0
57 @ CHECK: vrinta.f32 d3, d0 @ encoding: [0x00,0x35,0xba,0xf3]
58 vrinta.f32 q8, q2
59 @ CHECK: vrinta.f32 q8, q2 @ encoding: [0x44,0x05,0xfa,0xf3]
78 vrinta.f32.f32 d3, d0
79 @ CHECK: vrinta.f32 d3, d0 @ encoding: [0x00,0x35,0xba,0xf3]
Ddirective-arch_extension-simd.s87 vrinta.f32 s0, s0
89 vrinta.f64 d0, d0
91 vrinta.f32.f32 s0, s0
93 vrinta.f64.f64 d0, d0
195 vrinta.f32 s0, s0
197 vrinta.f64 d0, d0
199 vrinta.f32.f32 s0, s0
201 vrinta.f64.f64 d0, d0
Ddirective-arch_extension-fp.s115 vrinta.f32 s0, s0
117 vrinta.f64 d0, d0
119 vrinta.f32.f32 s0, s0
121 vrinta.f64.f64 d0, d0
251 vrinta.f32 s0, s0
253 vrinta.f64 d0, d0
255 vrinta.f32.f32 s0, s0
257 vrinta.f64.f64 d0, d0
Dthumb-fp-armv8.s115 vrinta.f64 d3, d4
116 @ CHECK: vrinta.f64 d3, d4 @ encoding: [0xb8,0xfe,0x44,0x3b]
117 vrinta.f32 s12, s1
118 @ CHECK: vrinta.f32 s12, s1 @ encoding: [0xb8,0xfe,0x60,0x6a]
Dfp-armv8.s109 vrinta.f64 d3, d4
110 @ CHECK: vrinta.f64 d3, d4 @ encoding: [0x44,0x3b,0xb8,0xfe]
111 vrinta.f32 s12, s1
112 @ CHECK: vrinta.f32 s12, s1 @ encoding: [0x60,0x6a,0xb8,0xfe]
Dfullfp16-neon.s364 vrinta.f16.f16 d0, d1
365 vrinta.f16.f16 q0, q1
366 @ ARM: vrinta.f16 d0, d1 @ encoding: [0x01,0x05,0xb6,0xf3]
367 @ ARM: vrinta.f16 q0, q1 @ encoding: [0x42,0x05,0xb6,0xf3]
368 @ THUMB: vrinta.f16 d0, d1 @ encoding: [0xb6,0xff,0x01,0x05]
369 @ THUMB: vrinta.f16 q0, q1 @ encoding: [0xb6,0xff,0x42,0x05]
Dinvalid-neon-v8.s19 vrinta.f64.f64 s3, d12
Dfullfp16-neon-neg.s261 vrinta.f16.f16 d0, d1
262 vrinta.f16.f16 q0, q1
Dinvalid-fp-armv8.s82 vrinta.f64.f64 s3, q0
Ddiagnostics.s473 vrinta.f32.f32 s6, s7
/external/llvm/test/MC/Disassembler/ARM/
Dneon-v8.txt57 # CHECK: vrinta.f32 d3, d0
59 # CHECK: vrinta.f32 q8, q2
Dthumb-neon-v8.txt57 # CHECK: vrinta.f32 d3, d0
59 # CHECK: vrinta.f32 q8, q2
Dfp-armv8.txt134 # CHECK: vrinta.f64 d3, d4
137 # CHECK: vrinta.f32 s12, s1
Dthumb-fp-armv8.txt142 # CHECK: vrinta.f64 d3, d4
145 # CHECK: vrinta.f32 s12, s1
Dfullfp16-neon-thumb.txt238 # CHECK: vrinta.f16 d0, d1
239 # CHECK: vrinta.f16 q0, q1
Dfullfp16-neon-arm.txt238 # CHECK: vrinta.f16 d0, d1
239 # CHECK: vrinta.f16 q0, q1
/external/llvm/test/CodeGen/ARM/
Darm32-rounding.ll40 ; CHECK: vrinta.f32
49 ; DP: vrinta.f64
/external/v8/test/cctest/
Dtest-disasm-arm.cc762 COMPARE(vrinta(d0, d0), "feb80b40 vrinta.f64.f64 d0, d0"); in TEST()
763 COMPARE(vrinta(d2, d3), "feb82b43 vrinta.f64.f64 d2, d3"); in TEST()
Dtest-assembler-arm.cc1926 __ vrinta(s5, s6); in TEST() local
2031 __ vrinta(d5, d6); in TEST() local
/external/llvm/test/CodeGen/Thumb2/
Dfloat-intrinsics-float.ll186 ; FP-ARMv8: vrinta.f32
Dfloat-intrinsics-double.ll192 ; FP-ARMv8: vrinta.f64
/external/v8/src/arm/
Dassembler-arm.h1214 void vrinta(const SwVfpRegister dst, const SwVfpRegister src);
1215 void vrinta(const DwVfpRegister dst, const DwVfpRegister src);
Dassembler-arm.cc3360 void Assembler::vrinta(const SwVfpRegister dst, const SwVfpRegister src) { in vrinta() function in v8::internal::Assembler
3374 void Assembler::vrinta(const DwVfpRegister dst, const DwVfpRegister src) { in vrinta() function in v8::internal::Assembler
/external/v8/src/compiler/arm/
Dcode-generator-arm.cc816 __ vrinta(i.OutputFloat64Register(), i.InputFloat64Register(0)); in AssembleArchInstruction() local